A 0.03 mm(2) delta-sigma modulator with cascaded-inverter amplifier
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Wang, Zhidong | - |
dc.contributor.author | Duan, Quanzhen | - |
dc.contributor.author | Roh, Jeongjin | - |
dc.date.accessioned | 2021-06-22T22:23:03Z | - |
dc.date.available | 2021-06-22T22:23:03Z | - |
dc.date.created | 2021-01-21 | - |
dc.date.issued | 2014-11 | - |
dc.identifier.issn | 0925-1030 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/21501 | - |
dc.description.abstract | A single stage inverter is introduced as a replacement for the conventional OTA to implement an inverter-based delta-sigma modulator. It achieves a high power and area efficiency. However, the low DC-gain and gain-bandwidth (GBW) have limited the application. This paper proposes a cascaded-inverter to increase the DC-gain and GBW, while maintaining the advantages of power and area efficiency. By cascading three inverters, the DC-gain is increased from 44 dB to 82 dB, and the GBW is increased from 100 MHz to 697 MHz. A third-order delta-sigma modulator using the proposed cascaded-inverter has been fabricated in a 0.11-mu m CMOS process. When operating from a 1.2-V supply and clocked at 80 MHz, the prototype modulator achieves 59.4-dB peak SNDR over 500-kHz signal bandwidth while consuming 249 mu W. Measurement results demonstrate that the application of the inverter-based amplifier, which is becoming popular due to its high power efficiency, can be extended to significantly higher speed circuits. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | SPRINGER | - |
dc.title | A 0.03 mm(2) delta-sigma modulator with cascaded-inverter amplifier | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Roh, Jeongjin | - |
dc.identifier.doi | 10.1007/s10470-014-0408-8 | - |
dc.identifier.scopusid | 2-s2.0-84919352386 | - |
dc.identifier.wosid | 000344168000015 | - |
dc.identifier.bibliographicCitation | ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v.81, no.2, pp.495 - 501 | - |
dc.relation.isPartOf | ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | - |
dc.citation.title | ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | - |
dc.citation.volume | 81 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 495 | - |
dc.citation.endPage | 501 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | POWER | - |
dc.subject.keywordAuthor | Delta-sigma modulator | - |
dc.subject.keywordAuthor | Analog-to-digital convertor | - |
dc.subject.keywordAuthor | Switched-capacitor circuit | - |
dc.subject.keywordAuthor | OTA | - |
dc.identifier.url | https://link.springer.com/article/10.1007/s10470-014-0408-8 | - |
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