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Memory Reliability Analysis for Multiple Block Effect of Soft Errors

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dc.contributor.authorLee, Soonyoung-
dc.contributor.authorJeon, Sang Hoon-
dc.contributor.authorBaeg, Sanghyeon-
dc.contributor.authorLee, Dongho-
dc.date.accessioned2021-06-23T03:44:16Z-
dc.date.available2021-06-23T03:44:16Z-
dc.date.created2021-01-21-
dc.date.issued2013-04-
dc.identifier.issn0018-9499-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/28456-
dc.description.abstractMultiple bit upsets (MBU) are analyzed from the perspective of the number of accessed blocks (NAB) in multiple memory block structures. The NAB represents the number of accessed blocks for a single memory operation. Statistical model of the MBU with regards to the NAB is developed, and its correlation to the test results presented. The tests were performed with neutron irradiation facility at The Svedberg Laboratory. The NAB in structure of multiple memory blocks is one of the most important parameter in determining the reliability of the memory. Although multiple cell upsets can be effectively spread out as multiple single bit upsets by interleaving distance scheme, the word failure rates are increased by combination of multiple events from multiple memory blocks. The proposed model can be effectively used for the estimation of the mean time to the failure with different design parameters during the early design states.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleMemory Reliability Analysis for Multiple Block Effect of Soft Errors-
dc.typeArticle-
dc.contributor.affiliatedAuthorBaeg, Sanghyeon-
dc.contributor.affiliatedAuthorLee, Dongho-
dc.identifier.doi10.1109/TNS.2013.2250519-
dc.identifier.scopusid2-s2.0-84876257814-
dc.identifier.wosid000320856800019-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON NUCLEAR SCIENCE, v.60, no.2, pp.1384 - 1389-
dc.relation.isPartOfIEEE TRANSACTIONS ON NUCLEAR SCIENCE-
dc.citation.titleIEEE TRANSACTIONS ON NUCLEAR SCIENCE-
dc.citation.volume60-
dc.citation.number2-
dc.citation.startPage1384-
dc.citation.endPage1389-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaNuclear Science & Technology-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryNuclear Science & Technology-
dc.subject.keywordPlusCELL UPSET-
dc.subject.keywordPlusSELECTION-
dc.subject.keywordPlusSRAMS-
dc.subject.keywordAuthorMemory-
dc.subject.keywordAuthormultiple blocks-
dc.subject.keywordAuthormultiple bit upset-
dc.subject.keywordAuthormultiple cell upset-
dc.subject.keywordAuthorsingle bit upset-
dc.subject.keywordAuthorsingle event upset-
dc.subject.keywordAuthorsoft error-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/6496324-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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