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Vertically Partitioned SRAM-Based Ternary Content Addressable Memory

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dc.contributor.authorUllah, Zahid-
dc.contributor.authorBaeg, Sanghyeon-
dc.date.accessioned2021-06-23T05:45:39Z-
dc.date.available2021-06-23T05:45:39Z-
dc.date.issued2012-12-
dc.identifier.issn2319-8613-
dc.identifier.issn0975-4024-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/31015-
dc.description.abstractThis paper proposes a novel memory architecture called VP SRAM-based TCAM (Vertically Partitioned Static Random Access Memory based-Ternary Content Addressable Memory) that emulates TCAM functionality with SRAM.VP SRAM-based TCAM dissects conventional TCAM table vertically (column-wise) into TCAM sub-tables, which are then processed to be stored in their corresponding SRAM blocks. During search operation, SRAM blocks are addressed in parallel by their corresponding sub-words of the input word and the read out rows of which are bit-wise ANDed that results in potential matching address(s) where a priority encoder selects the highest priority matching address. Search operation in VP SRAM-based TCAM involves two SRAM accesses followed by ANDing operation. Analysis shows that maximum possible number of vertical partitions reduces size of the proposed TCAM approximately by a factor of 1.3 than its traditional counterpart and offers optimized values for both area and latency of VP SRAM-based TCAM and hence, is a practically feasible alternative to traditional TCAMs.-
dc.format.extent5-
dc.language영어-
dc.language.isoENG-
dc.publisherIJET-
dc.titleVertically Partitioned SRAM-Based Ternary Content Addressable Memory-
dc.typeArticle-
dc.publisher.location인도-
dc.identifier.doi10.7763/IJET.2012.V4.479-
dc.identifier.bibliographicCitationInternational Journal of Engineering and Technology, v.4, no.6, pp 760 - 764-
dc.citation.titleInternational Journal of Engineering and Technology-
dc.citation.volume4-
dc.citation.number6-
dc.citation.startPage760-
dc.citation.endPage764-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassforeign-
dc.subject.keywordAuthorMemory architecture-
dc.subject.keywordAuthorvertical partition-
dc.subject.keywordAuthorTCAM-
dc.subject.keywordAuthorSRAM-
dc.subject.keywordAuthorternary content addressable memory-
dc.identifier.urlhttp://www.ijetch.org/show-46-365-1.html-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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