Hybrid Partitioned SRAM-Based Ternary Content Addressable Memory
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Ullah, Zahid | - |
dc.contributor.author | Ilgon, Kim | - |
dc.contributor.author | Baeg, Sanghyeon | - |
dc.date.accessioned | 2021-06-23T06:03:07Z | - |
dc.date.available | 2021-06-23T06:03:07Z | - |
dc.date.created | 2021-01-21 | - |
dc.date.issued | 2012-12 | - |
dc.identifier.issn | 1549-8328 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/31322 | - |
dc.description.abstract | Although content addressable memory (CAM) provides fast search operation; however, CAM has disadvantages like low bit density and high cost per bit. This paper presents a novel memory architecture called hybrid partitioned static random access memory-based ternary content addressable memory (HP SRAM-based TCAM), which emulates TCAM functionality with conventional SRAM, thereby eliminating the inherited disadvantages of conventional TCAMs. HP SRAM-based TCAM logically dissects conventional TCAM table in a hybrid way (column-wise and row-wise) into TCAM sub-tables, which are then processed to be mapped to their corresponding SRAM memory units. Search operation in HP SRAM-based TCAM involves two SRAM accesses followed by a logical ANDing operation. To validate and justify our approach, 512 36 HP SRAM-based TCAM has been implemented in Xilinx Virtex-5 field programmable gate array (FPGA) and designed using 65-nm CMOS technology. Implementation in FPGA is advantageous and a beauty of our proposed TCAM because classical TCAMs cannot be implemented in FPGA. After a thorough analysis, we have concluded that energy/bit/search of the proposed TCAM is 85.72 fJ. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Hybrid Partitioned SRAM-Based Ternary Content Addressable Memory | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Baeg, Sanghyeon | - |
dc.identifier.doi | 10.1109/TCSI.2012.2215736 | - |
dc.identifier.scopusid | 2-s2.0-84870512268 | - |
dc.identifier.wosid | 000311803300016 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.59, no.12, pp.2969 - 2979 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.citation.title | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.citation.volume | 59 | - |
dc.citation.number | 12 | - |
dc.citation.startPage | 2969 | - |
dc.citation.endPage | 2979 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | POWER | - |
dc.subject.keywordPlus | CAM | - |
dc.subject.keywordPlus | DESIGN | - |
dc.subject.keywordPlus | TCAM | - |
dc.subject.keywordPlus | ARCHITECTURE | - |
dc.subject.keywordAuthor | ANDing operation | - |
dc.subject.keywordAuthor | APT | - |
dc.subject.keywordAuthor | APTAG | - |
dc.subject.keywordAuthor | BPT | - |
dc.subject.keywordAuthor | hybrid partition | - |
dc.subject.keywordAuthor | SRAM | - |
dc.subject.keywordAuthor | TCAM | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/6323051 | - |
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