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CMOS 전압 레벨-업 쉬프터 회로
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 노정진[노정진] | - |
| dc.date.accessioned | 2021-06-23T09:02:53Z | - |
| dc.date.available | 2021-06-23T09:02:53Z | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/35620 | - |
| dc.title | CMOS 전압 레벨-업 쉬프터 회로 | - |
| dc.title.alternative | CMOS voltage level-up shifter circuit | - |
| dc.type | Patent | - |
| dc.contributor.affiliatedAuthor | 노정진[노정진] | - |
| dc.type.rims | PAT | - |
| dc.type.iprs | 특허 | - |
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Collections - COLLEGE OF ENGINEERING SCIENCES > SCHOOL OF ELECTRICAL ENGINEERING > 4. Patents
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Related Researcher
- Roh, Jeong jin
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)