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Performance-Driven Technology Mapping for LUT-Based FPGAs
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 신현철 | - |
| dc.date.accessioned | 2021-06-23T10:46:18Z | - |
| dc.date.available | 2021-06-23T10:46:18Z | - |
| dc.date.created | 2020-12-17 | - |
| dc.date.issued | 1994-09-01 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/37646 | - |
| dc.publisher | IEEE | - |
| dc.title | Performance-Driven Technology Mapping for LUT-Based FPGAs | - |
| dc.type | Conference | - |
| dc.contributor.affiliatedAuthor | 신현철 | - |
| dc.identifier.bibliographicCitation | ASIC Conference | - |
| dc.relation.isPartOf | ASIC Conference | - |
| dc.citation.title | ASIC Conference | - |
| dc.type.rims | CONF | - |
| dc.description.journalClass | 1 | - |
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