Reduction of Line Width and Edge Roughness by Using a Resist Reflow Process for Extreme Ultraviolet Lithography

Abstract

Extreme ultraviolet lithography (EUVL) has been prepared for next-generation lithography for several years. We can get a sub-22 nut line and space (L/S) pattern by using EUVL, but there are still some problems, such as roughness, sensitivity, and resolution. According to the 2009 international technology roadmap for semiconductors (ITRS), line edge roughness (LER) has to be below 1.3 nm to get a 22 nm node, but it is too difficult to control the linewidth roughness (LWR) because the linewidth is determined by not only the post-exposure bake (PEB) time, temperature, and acid diffusion length, but also the components and the size of the resist. A new method is suggested to reduce the roughness. The surface roughness can be smoothed by applying the resist reflow process (RRP) for the developed resist. We made a. resist profile which has surface roughness by applying an exposure. PEB, and development process for the L/S pattern. The surface roughness was calculated by changing parameters such as the protected ratio of resin. The PEB time was also varied. We checked 1:1 L/S pattern for 22 nm. A developed resist baked at a temperature above the glass transition temperature will flow, and the surface will be smoothed. As a result, LER and LWR will be much smaller after RRP. The result shows that the decreasing ratio of LER clue to REP is larger when the initial LER is large. We believe that the current similar to 5 nm LWR, can be smoothed down to similar to 1 nm by using REP after developing the resist.