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Formation principle of interfacial voids in a porous anodic alumina template on a Si wafer

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dc.contributor.authorSeo, Hong-Seok-
dc.contributor.authorJee, Sang-Won-
dc.contributor.authorLee, Jung-Ho-
dc.date.accessioned2021-06-23T19:01:59Z-
dc.date.available2021-06-23T19:01:59Z-
dc.date.issued2007-12-
dc.identifier.issn0374-4884-
dc.identifier.issn1976-8524-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/43196-
dc.description.abstractA porous anodic alumina (PAA) template on a Si wafer enables high-density, size-controlled nanowire arrays, which are then vertically integrated over wafer-scale areas to fabricate nanodevices, such as field-effect-transistors and sensors. The presence of interfacial voids between the alumina film and the Si substrate has been reported, but the principle of void formation remains poorly understood. We report that the alumina transformation of the Al metal remaining when the barrier layer of nanopores touches the substrate nucleates the interfacial voids so as to accommodate the stresses of volume expansion without devastating the pore arrays.-
dc.language영어-
dc.language.isoENG-
dc.publisher한국물리학회-
dc.titleFormation principle of interfacial voids in a porous anodic alumina template on a Si wafer-
dc.typeArticle-
dc.publisher.location대한민국-
dc.identifier.doi10.3938/jkps.51.1863-
dc.identifier.scopusid2-s2.0-38349164372-
dc.identifier.wosid000251680700001-
dc.identifier.bibliographicCitationJournal of the Korean Physical Society, v.51, no.6, pp L1863 - L1866-
dc.citation.titleJournal of the Korean Physical Society-
dc.citation.volume51-
dc.citation.number6-
dc.citation.startPageL1863-
dc.citation.endPageL1866-
dc.type.docTypeLetter-
dc.identifier.kciidART001210373-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.description.journalRegisteredClasskci-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryPhysics, Multidisciplinary-
dc.subject.keywordPlusFIELD-EFFECT TRANSISTOR-
dc.subject.keywordPlusSILICON SUBSTRATE-
dc.subject.keywordPlusNANOWIRE ARRAYS-
dc.subject.keywordPlusOXIDE-
dc.subject.keywordPlusNANOTEMPLATE-
dc.subject.keywordPlusFABRICATION-
dc.subject.keywordPlusANODIZATION-
dc.subject.keywordPlusINTEGRATION-
dc.subject.keywordPlusFILMS-
dc.subject.keywordAuthoraluminum-
dc.subject.keywordAuthoranodization-
dc.subject.keywordAuthorsilicon-
dc.subject.keywordAuthornanopore array-
dc.subject.keywordAuthornanowire-
dc.subject.keywordAuthorbarrier layer-
dc.identifier.urlhttps://www.kci.go.kr/kciportal/ci/sereArticleSearch/ciSereArtiView.kci?sereArticleSearchBean.artiId=ART001210373-
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ERICA 첨단융합대학 (ERICA 신소재·반도체공학전공)
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