SRAM셀 간의 AC 커플링 고장의 해석
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 배종선 | - |
dc.contributor.author | 백상현 | - |
dc.date.accessioned | 2021-06-23T19:39:02Z | - |
dc.date.available | 2021-06-23T19:39:02Z | - |
dc.date.issued | 2007-06 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/43621 | - |
dc.description.abstract | AC type of defects increases with increasing silicon density in a limited area and high operating speeds. The capacitive defects, which behave as low impedance paths to white noises between memory cells reduce memory reliabilities. The stored data can be flipped if noises through the coupling defects influence neighborhood memory cells at transient state. In this paper, we show the worst-case with capacitive defects and AC coupling defect model. Spice simulations are also presented. | - |
dc.format.extent | 3 | - |
dc.language | 한국어 | - |
dc.language.iso | KOR | - |
dc.publisher | 한국테스트협회 | - |
dc.title | SRAM셀 간의 AC 커플링 고장의 해석 | - |
dc.title.alternative | Analysis of AC Coupling Defect for SRAM Cell | - |
dc.type | Article | - |
dc.identifier.bibliographicCitation | 한국테스트협회논문집, pp 1 - 3 | - |
dc.citation.title | 한국테스트협회논문집 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 3 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | domestic | - |
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