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Design of test access mechanism for AMBA-based system-on-a-chip

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dc.contributor.authorSong, Jaehoon-
dc.contributor.authorMin, Piljae-
dc.contributor.authorYi, Hyunbean-
dc.contributor.authorPark, Sungjin-
dc.date.accessioned2021-06-23T20:43:58Z-
dc.date.available2021-06-23T20:43:58Z-
dc.date.created2021-01-22-
dc.date.issued2007-05-
dc.identifier.issn1093-0167-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/44361-
dc.description.abstractA Test Interface Controller (TIC) provided by ARM Ltd. is widely used for functional testing of System-on-a-Chip (SoC) which adopts an Advanced Microcontroller Bus Architecture (AMBA) bus system. Unfortunately, this architecture has the deficiency of not being able to concurrently shift in and out the structural scan test patterns through the TIC and AMBA bus. This paper introduces a new AMBA based Test Access Mechanism (ATAM) for speedy testing of SoCs embedding ARM cores. Since scan-in and out operations can be performed simultaneously, test application time on the expensive Automatic Test Equipment (ATE) can be drastically reduced while preserving the compatibility with the ARM TIC. © 2007 IEEE.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-
dc.titleDesign of test access mechanism for AMBA-based system-on-a-chip-
dc.typeArticle-
dc.contributor.affiliatedAuthorPark, Sungjin-
dc.identifier.doi10.1109/VTS.2007.25-
dc.identifier.scopusid2-s2.0-37549021514-
dc.identifier.wosid000246798100047-
dc.identifier.bibliographicCitationProceedings of the IEEE VLSI Test Symposium, pp.375 - 380-
dc.relation.isPartOfProceedings of the IEEE VLSI Test Symposium-
dc.citation.titleProceedings of the IEEE VLSI Test Symposium-
dc.citation.startPage375-
dc.citation.endPage380-
dc.type.rimsART-
dc.type.docTypeConference Paper-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusAutomatic Test Equipment (ATE)-
dc.subject.keywordPlusDesign of test-
dc.subject.keywordPlusSystem-on-a-Chip (SoC)-
dc.subject.keywordPlusTest Interface Controller (TIC)-
dc.subject.keywordPlusAutomatic testing-
dc.subject.keywordPlusChip scale packages-
dc.subject.keywordPlusInterfaces (materials)-
dc.subject.keywordPlusNetwork architecture-
dc.subject.keywordPlusProblem solving-
dc.subject.keywordPlusElectronic equipment testing-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/4209941-
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