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A 80%-Efficiency Digital Audio Amplifier with 4-Ω Speaker load Using 1-bit 4th-Order Delta-Sigma Modulation
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kang, Kyoungsik | - |
| dc.contributor.author | Choi, Youngkil | - |
| dc.contributor.author | Roh, Hyungdong | - |
| dc.contributor.author | Byun, Sanho | - |
| dc.contributor.author | Lee, Hyuntae | - |
| dc.contributor.author | Roh, Jeongjin | - |
| dc.date.accessioned | 2021-06-23T21:06:18Z | - |
| dc.date.available | 2021-06-23T21:06:18Z | - |
| dc.date.issued | 2006-10 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/44652 | - |
| dc.description.abstract | This paper presents the design of a single chip digital audio amplifier based on delta-sigma modulation and a power-efficient swithing output stage. The amplifier uses a fouth-order switched-capacitor high performance delta-sigma modulator with a 1bit quantizer and designed in standard 0.18um CMOS process. | - |
| dc.format.extent | 4 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | 대한전자공학회 | - |
| dc.title | A 80%-Efficiency Digital Audio Amplifier with 4-Ω Speaker load Using 1-bit 4th-Order Delta-Sigma Modulation | - |
| dc.type | Article | - |
| dc.publisher.location | 대한민국 | - |
| dc.identifier.bibliographicCitation | International SOC design conference, pp 95 - 98 | - |
| dc.citation.title | International SOC design conference | - |
| dc.citation.startPage | 95 | - |
| dc.citation.endPage | 98 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | other | - |
| dc.subject.keywordAuthor | Class-D | - |
| dc.subject.keywordAuthor | Delta-Sigma | - |
| dc.subject.keywordAuthor | efficiency | - |
| dc.subject.keywordAuthor | THD Dynamic Range | - |
| dc.identifier.url | https://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01793011 | - |
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Related Researcher
- Roh, Jeong jin
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)