A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors

Abstract

In this brief, we present a capacitance-to-digital converter (CDC) for one-terminal capacitive sensors. The designed CDC implements a digital correction technique to reduce non-idealities and noises, such as the offset, 1/f noise, and power supply noise. This correction technique can also minimize effectively the complexity of the analog front-end circuit. All sensor functions, including analog circuits (delta-sigma CDC, bandgap reference, and voltage regulator) and digital logics (microprocessor, memories, and interface logics), are integrated into a single chip and occupy approximately 90% of the area. The chip is fabricated in a 0.18-mu m standard CMOS process, which does not have a deep n-well stage. The analog and digital circuits, including the digital input/output pads, must share the same substrate in this design. However, the measurement results demonstrate highly effective resolutions of 16 to 17.4 b, which are achieved with different conversion times.