Resistive switching characteristics of Si3N4-based resistive-switching random-access memory cell with tunnel barrier for high density integration and low-power applications
DC Field | Value | Language |
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dc.contributor.author | Kim, Sungjun | - |
dc.contributor.author | Jung, Sunghun | - |
dc.contributor.author | Kim, Min-Hwi | - |
dc.contributor.author | Cho, Seongjae | - |
dc.contributor.author | Park, Byung-Gook | - |
dc.date.available | 2020-02-28T09:42:57Z | - |
dc.date.created | 2020-02-06 | - |
dc.date.issued | 2015-05-25 | - |
dc.identifier.issn | 0003-6951 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/10512 | - |
dc.description.abstract | In this letter, a bipolar resistive-switching random-access memory (RRAM) in Ni/Si3N4/SiO2/p(+)-Si structure and its fabrication process are demonstrated. The proposed device with double-layer dielectrics consisting of Si3N4 layer (5 nm) as a resistive switching and SiO2 (2.5 nm) layer for the tunnel barrier is investigated in comparison with that having a single layer of Si3N4. Double-layer cell shows ultra-low power operation under a compliance current (I-COMP) of 500 nA, which ensures the reset current (I-RESET) of sub-1 mu A much lower than that of the single-layer cell. Also, large on/off ratio (similar to 10(5)) has been obtained since the SiO2 layer efficiently suppresses the current in the high-resistance state. Moreover, maximum selectivity in double-layer cell is 122 when 1/2 read bias scheme is applied to the crossbar array. Highly nonlinear I-V characteristics of the double-layer Si3N4-based RRAM cell warrant the realization of selector-free RRAM cell in the crossbar array pursuing higher integration density. (C) 2015 AIP Publishing LLC. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | AMER INST PHYSICS | - |
dc.relation.isPartOf | APPLIED PHYSICS LETTERS | - |
dc.subject | DEVICE | - |
dc.title | Resistive switching characteristics of Si3N4-based resistive-switching random-access memory cell with tunnel barrier for high density integration and low-power applications | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000355631400018 | - |
dc.identifier.doi | 10.1063/1.4921926 | - |
dc.identifier.bibliographicCitation | APPLIED PHYSICS LETTERS, v.106, no.21 | - |
dc.identifier.scopusid | 2-s2.0-84930624923 | - |
dc.citation.title | APPLIED PHYSICS LETTERS | - |
dc.citation.volume | 106 | - |
dc.citation.number | 21 | - |
dc.contributor.affiliatedAuthor | Cho, Seongjae | - |
dc.type.docType | Article | - |
dc.subject.keywordPlus | DEVICE | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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