Design and Analysis of Sub-10 nm Junctionless Fin-Shaped Field-Effect Transistors
DC Field | Value | Language |
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dc.contributor.author | Kim, Sung Yoon | - |
dc.contributor.author | Seo, Jae Hwa | - |
dc.contributor.author | Yoon, Young Jun | - |
dc.contributor.author | Yoo, Gwan Min | - |
dc.contributor.author | Kim, Young Jae | - |
dc.contributor.author | Eun, Hye Rim | - |
dc.contributor.author | Kang, Hye Su | - |
dc.contributor.author | Kim, Jungjoon | - |
dc.contributor.author | Cho, Seongjae | - |
dc.contributor.author | Lee, Jung-Hee | - |
dc.contributor.author | Kang, In Man | - |
dc.date.available | 2020-02-28T16:42:34Z | - |
dc.date.created | 2020-02-06 | - |
dc.date.issued | 2014-10 | - |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/12271 | - |
dc.description.abstract | We design and analyze the n-channel junctionless fin-shaped field-effect transistor (JL FinFET) with 10-nm gate length and compare its performances with those of the conventional bulk-type fin-shaped FET (conventional bulk FinFET). A three-dimensional (3-D) device simulations were performed to optimize the device design parameters including the width (W-fin) and height (H-fin) of the fin as well as the channel doping concentration (N-ch). Based on the design optimization, the two devices were compared in terms of direct-current (DC) and radio-frequency (RF) characteristics. The results reveal that the JL FinFET has better subthreshold swing, and more effectively suppresses short-channel effects (SCEs) than the conventional bulk FinFET. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEK PUBLICATION CENTER | - |
dc.relation.isPartOf | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.subject | GATE | - |
dc.subject | MOSFET | - |
dc.title | Design and Analysis of Sub-10 nm Junctionless Fin-Shaped Field-Effect Transistors | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000346137400003 | - |
dc.identifier.doi | 10.5573/JSTS.2014.14.5.508 | - |
dc.identifier.bibliographicCitation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.14, no.5, pp.508 - 517 | - |
dc.identifier.kciid | ART001923352 | - |
dc.identifier.scopusid | 2-s2.0-84908336168 | - |
dc.citation.endPage | 517 | - |
dc.citation.startPage | 508 | - |
dc.citation.title | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.volume | 14 | - |
dc.citation.number | 5 | - |
dc.contributor.affiliatedAuthor | Cho, Seongjae | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Junctionless | - |
dc.subject.keywordAuthor | fin-shaped field-effect transistor (FinFET) | - |
dc.subject.keywordAuthor | short-channel effect (SCE) | - |
dc.subject.keywordAuthor | 3-D device simulation | - |
dc.subject.keywordPlus | GATE | - |
dc.subject.keywordPlus | MOSFET | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.description.journalRegisteredClass | kci | - |
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