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Effect of an Organic Buffer Layer on the Stability of Zinc Oxide Thin-Film Transistors

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dc.contributor.authorLee, H. W.-
dc.contributor.authorHyung, G. W.-
dc.contributor.authorKoo, J. R.-
dc.contributor.authorCho, E. S.-
dc.contributor.authorKwon, S. J.-
dc.contributor.authorPark, J. H.-
dc.contributor.authorKim, Y. K.-
dc.date.available2020-02-28T16:47:14Z-
dc.date.created2020-02-06-
dc.date.issued2014-07-
dc.identifier.issn1533-4880-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/12504-
dc.description.abstractCompared with other materials, zinc oxide (ZnO) exhibits stability in air, high-electron mobility, transparency and low light sensitivity. We investigated these properties in ZnO thin-film transistors (TFTs) containing a cross-linked poly(vinyl alcohol) (C-PVA) (1:3) buffer layer stacked between the semiconductor and gate dielectric. We measured the impact of this C-PVA layer on gate bias stress. We measured the transfer characteristics of the saturation region to determine the threshold voltage and the field-effect mobility of the transistors. We recorded a threshold voltage of 11.53 V in the ZnO TFTs with the C-PVA buffer layer, the field-effect mobility was 0.2 cm(2)/Vs. There was a positive shift in the threshold voltage of Delta V-TH approximate to 10 V in response to the application of a gate bias stress of 20 V. The positive shift in the threshold voltage was lower than that in pristine ZnO TFTs. This finding suggests that the shift in threshold voltage was due to reduced charge trapping at the semiconductor-gate dielectric interface. Our report indicates that the organic buffer layer enhanced the stability of ZnO TFTs.-
dc.language영어-
dc.language.isoen-
dc.publisherAMER SCIENTIFIC PUBLISHERS-
dc.relation.isPartOfJOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY-
dc.titleEffect of an Organic Buffer Layer on the Stability of Zinc Oxide Thin-Film Transistors-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid000332926400041-
dc.identifier.doi10.1166/jnn.2014.8425-
dc.identifier.bibliographicCitationJOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.14, no.7, pp.5070 - 5074-
dc.description.isOpenAccessN-
dc.identifier.scopusid2-s2.0-84903823357-
dc.citation.endPage5074-
dc.citation.startPage5070-
dc.citation.titleJOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY-
dc.citation.volume14-
dc.citation.number7-
dc.contributor.affiliatedAuthorCho, E. S.-
dc.contributor.affiliatedAuthorKwon, S. J.-
dc.type.docTypeArticle-
dc.subject.keywordAuthorZnO Transistor-
dc.subject.keywordAuthorC-PVA Organic Buffer Layer-
dc.subject.keywordAuthorThreshold Voltage Shift-
dc.subject.keywordAuthorHysteresis-
dc.subject.keywordPlusCRYSTALLIZATION-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordPlusDEPOSITION-
dc.relation.journalResearchAreaChemistry-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalResearchAreaMaterials Science-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryChemistry, Multidisciplinary-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.relation.journalWebOfScienceCategoryMaterials Science, Multidisciplinary-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.relation.journalWebOfScienceCategoryPhysics, Condensed Matter-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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반도체대학 (반도체·전자공학부)
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