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Effect of spacer dielectrics on performance characteristics of Ge-based tunneling field-effect transistors

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dc.contributor.authorYoon, Young Jun-
dc.contributor.authorSeo, Jae Hwa-
dc.contributor.authorKang, Hee-Sung-
dc.contributor.authorKim, Young-Jo-
dc.contributor.authorBae, Jin-Hyuk-
dc.contributor.authorCho, Eou-Sik-
dc.contributor.authorLee, Jung-Hee-
dc.contributor.authorCho, Seongjae-
dc.contributor.authorKang, In Man-
dc.date.available2020-02-28T17:42:51Z-
dc.date.created2020-02-06-
dc.date.issued2014-06-
dc.identifier.issn0021-4922-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/12600-
dc.description.abstractIn this study, we investigated the effects of dielectric materials for spacers on the performance characteristics of germanium (Ge)-based tunneling field-effect transistors (TFETs). Direct current (DC), radio frequency (RF), and switching performance characteristics were analyzed using various spacer dielectric materials including recent interlayer dielectric (ILD) oxides, silicon dioxide (SiO2), silicon nitride (Si3N4), and hafnium oxide (HfO2). Since spacer dielectrics affect the band bending in the source and drain regions caused by fringing fields, a Ge-based TFET having a low-kappa. spacer dielectric showed a high current drivability owing to its steep energy-band bending on the source side. At the same time, outstanding switching and RF performance characteristics were achieved by reducing parasitic capacitances when a low-. spacer dielectric was employed. On this basis, a Ge-based TFET with a low-. spacer dielectric was designed with a drain underlap for satisfactory control of the ambipolar behaviors and for optimization of RF performance characteristics. It was proven that the drain underlap suppressed ambipolar current characteristics and reduced gate capacitance by minimizing the electric field induced by the gate electrode on the drain-side channel without degradation of current drivability. (C) 2014 The Japan Society of Applied Physics-
dc.language영어-
dc.language.isoen-
dc.publisherIOP PUBLISHING LTD-
dc.relation.isPartOfJAPANESE JOURNAL OF APPLIED PHYSICS-
dc.subjectFET-
dc.subjectVOLTAGE-
dc.subjectDEVICE-
dc.subjectIMPACT-
dc.titleEffect of spacer dielectrics on performance characteristics of Ge-based tunneling field-effect transistors-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid000338439500024-
dc.identifier.doi10.7567/JJAP.53.06JE05-
dc.identifier.bibliographicCitationJAPANESE JOURNAL OF APPLIED PHYSICS, v.53, no.6-
dc.identifier.scopusid2-s2.0-84903274193-
dc.citation.titleJAPANESE JOURNAL OF APPLIED PHYSICS-
dc.citation.volume53-
dc.citation.number6-
dc.contributor.affiliatedAuthorCho, Eou-Sik-
dc.contributor.affiliatedAuthorCho, Seongjae-
dc.type.docTypeArticle-
dc.subject.keywordPlusFET-
dc.subject.keywordPlusVOLTAGE-
dc.subject.keywordPlusDEVICE-
dc.subject.keywordPlusIMPACT-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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반도체대학 (반도체·전자공학부)
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