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Fabrication of Sputtered Gated Silicon Field Emitter Arrays with Low Gate Leakage Currents by Using Si Dry Etch

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dc.contributor.authorCho, E.S.-
dc.contributor.authorKwon, S.J.-
dc.date.available2020-02-29T00:47:10Z-
dc.date.created2020-02-12-
dc.date.issued2013-02-
dc.identifier.issn1229-7607-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/14885-
dc.description.abstractA volcano shaped gated Si-FEA (silicon field emitter array) was simply fabricated using sputtering as a gate electrode deposition and lift-off for the removal of the oxide mask, respectively. Due to the limited step coverage of well- controlled sputtering and the high aspect ratio in Si dry etch caused by high RF power, it was possible to obtain Si FEAs with a stable volcano shaped gate structure and to realize the restriction of gate leakage current in field emission characteristics. For 100 tip arrays and 625 tip arrays, gate leakage currents were restricted to less than 1% of the anode current in spite of the volcano-shaped gate structure. It was also possible to keep the emitters stable without any failure between the Si cathode and gate electrode in field emission for a long time. Copyright © 2013 KIEEME. All rights reserved.-
dc.language영어-
dc.language.isoen-
dc.publisher한국전기전자재료학회-
dc.relation.isPartOfTransactions on Electrical and Electronic Materials-
dc.titleFabrication of Sputtered Gated Silicon Field Emitter Arrays with Low Gate Leakage Currents by Using Si Dry Etch-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.doi10.4313/TEEM.2013.14.1.28-
dc.identifier.bibliographicCitationTransactions on Electrical and Electronic Materials, v.14, no.1, pp.28 - 31-
dc.identifier.kciidART001742291-
dc.description.isOpenAccessN-
dc.identifier.scopusid2-s2.0-84874348862-
dc.citation.endPage31-
dc.citation.startPage28-
dc.citation.titleTransactions on Electrical and Electronic Materials-
dc.citation.volume14-
dc.citation.number1-
dc.contributor.affiliatedAuthorCho, E.S.-
dc.contributor.affiliatedAuthorKwon, S.J.-
dc.type.docTypeArticle-
dc.subject.keywordAuthorDry etch-
dc.subject.keywordAuthorField emission-
dc.subject.keywordAuthorLow gate leakage current-
dc.subject.keywordAuthorSputtering-
dc.subject.keywordAuthorVolcano shaped gated Si-FEAs-
dc.subject.keywordPlusAnode currents-
dc.subject.keywordPlusDry-etch-
dc.subject.keywordPlusGate electrode deposition-
dc.subject.keywordPlusGate electrodes-
dc.subject.keywordPlusGate structure-
dc.subject.keywordPlusGate-leakage current-
dc.subject.keywordPlusHigh aspect ratio-
dc.subject.keywordPlusIn-field-
dc.subject.keywordPlusRf-power-
dc.subject.keywordPlusSilicon field emitter arrays-
dc.subject.keywordPlusStep Coverage-
dc.subject.keywordPlusAspect ratio-
dc.subject.keywordPlusField emission-
dc.subject.keywordPlusGate dielectrics-
dc.subject.keywordPlusLeakage currents-
dc.subject.keywordPlusSilicon-
dc.subject.keywordPlusSputtering-
dc.subject.keywordPlusVolcanoes-
dc.subject.keywordPlusField emission cathodes-
dc.description.journalRegisteredClassscopus-
dc.description.journalRegisteredClasskci-
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반도체대학 (반도체·전자공학부)
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