Detailed Information

Cited 9 time in webofscience Cited 10 time in scopus
Metadata Downloads

Analysis of the sensing margin of silicon and poly-Si 1T-DRAM

Full metadata record
DC Field Value Language
dc.contributor.authorKim H.-
dc.contributor.authorYoo S.-
dc.contributor.authorKang I.-M.-
dc.contributor.authorCho S.-
dc.contributor.authorSun W.-
dc.contributor.authorShin H.-
dc.date.available2020-04-06T07:36:37Z-
dc.date.created2020-04-02-
dc.date.issued2020-02-
dc.identifier.issn2072-666X-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/26374-
dc.description.abstractRecently, one-transistor dynamic random-access memory (1T-DRAM) cells having a polysilicon body (poly-Si 1T-DRAM) have attracted attention as candidates to replace conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). Poly-Si 1T-DRAM enables the cost-effective implementation of a silicon-on-insulator (SOI) structure and a three-dimensional (3D) stacked architecture for increasing integration density. However, studies on the transient characteristics of poly-Si 1T-DRAM are still lacking. In this paper, with TCAD simulation, we examine the differences between the memory mechanisms in poly-Si and silicon body 1T-DRAM. A silicon 1T-DRAM cell's data state is determined by the number of holes stored in a floating body (FB), while a poly-Si 1T-DRAM cell's state depends on the number of electrons trapped in its grain boundary (GB). This means that a poly-Si 1T-DRAM can perform memory operations by using GB as a storage region in thin body devices with a small FB area. © 2020 by the authors.-
dc.language영어-
dc.language.isoen-
dc.publisherMDPI AG-
dc.relation.isPartOfMicromachines-
dc.titleAnalysis of the sensing margin of silicon and poly-Si 1T-DRAM-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid000520181500117-
dc.identifier.doi10.3390/mi11020228-
dc.identifier.bibliographicCitationMicromachines, v.11, no.2, pp.1 - 8-
dc.description.isOpenAccessN-
dc.identifier.scopusid2-s2.0-85081158219-
dc.citation.endPage8-
dc.citation.startPage1-
dc.citation.titleMicromachines-
dc.citation.volume11-
dc.citation.number2-
dc.contributor.affiliatedAuthorCho S.-
dc.type.docTypeArticle-
dc.subject.keywordAuthorElectron trapping-
dc.subject.keywordAuthorGrain boundary-
dc.subject.keywordAuthorOne-transistor dynamic random-access memory (1T-DRAM)-
dc.subject.keywordAuthorPolysilicon-
dc.subject.keywordPlusCost effectiveness-
dc.subject.keywordPlusFloating breakwaters-
dc.subject.keywordPlusGrain boundaries-
dc.subject.keywordPlusPolysilicon-
dc.subject.keywordPlusSilicon on insulator technology-
dc.subject.keywordPlusCost-effective implementations-
dc.subject.keywordPlusDynamic random access memory-
dc.subject.keywordPlusElectron trapping-
dc.subject.keywordPlusIntegration density-
dc.subject.keywordPlusOne-transistor dynamic random access memory (1t-dram)-
dc.subject.keywordPlusSilicon on insulator structures-
dc.subject.keywordPlusThreedimensional (3-d)-
dc.subject.keywordPlusTransient characteristic-
dc.subject.keywordPlusDynamic random access storage-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
Files in This Item
There are no files associated with this item.
Appears in
Collections
IT융합대학 > 전자공학과 > 1. Journal Articles

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher Cho, Seong Jae photo

Cho, Seong Jae
IT (Major of Electronic Engineering)
Read more

Altmetrics

Total Views & Downloads

BROWSE