Integrate-and-fire neuron circuit using positive feedback field effect transistor for low power operation
DC Field | Value | Language |
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dc.contributor.author | Kwon, Min-Woo | - |
dc.contributor.author | Baek, Myung-Hyun | - |
dc.contributor.author | Hwang, Sungmin | - |
dc.contributor.author | Park, Kyungchul | - |
dc.contributor.author | Jang, Tejin | - |
dc.contributor.author | Kim, Taehyung | - |
dc.contributor.author | Lee, Junil | - |
dc.contributor.author | Cho, Seongjae | - |
dc.contributor.author | Park, Byung-Gook | - |
dc.date.available | 2020-02-27T08:43:06Z | - |
dc.date.created | 2020-02-06 | - |
dc.date.issued | 2018-10-21 | - |
dc.identifier.issn | 0021-8979 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/3209 | - |
dc.description.abstract | In this work, we fabricated a dual gate positive feedback field-effect transistor (FBFET) integrated with CMOS. We investigated the DC and transient characteristics of the FBFET. The fabricated FBFET has an extremely low sub-threshold slope of less than 2.3 mV/dec and low off-current. We also propose an analog integrated-and-fire neuron circuit incorporating a FBFET, which significantly reduces the power dissipation of hardware neural networks. In a conventional neuron circuit using a membrane capacitor to integrate input pulses, most of the energy is consumed by the first inverter stage connected to the capacitor. Since the membrane capacitor is charged slowly compared to digital logic, a large amount of short-circuit current flows between V-dd and ground in the first inverter during this period. In the proposed neuron circuit, the short-circuit current is significantly suppressed by adopting a FBFET in the inverter. Through TCAD mixed mode simulation of the device and the circuit, we compare the energy consumption of a conventional and the proposed neuron circuits. In a single neuron circuit with microsecond duration pulses, 58% of the energy consumption is reduced by incorporating a FBFET. We performed SPICE compact modeling of FBFET, and its parameters were fitted to match the measurement results of the fabricated FBFET. Then, we conducted a circuit simulation to verify the operating neural networks. We implemented a single layer spiking neural network (SNN) that had resistive synaptic devices. In the SNN simulation, approximately 94% of the average power consumption of all output neurons was reduced. Published by AIP Publishing. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | AMER INST PHYSICS | - |
dc.relation.isPartOf | JOURNAL OF APPLIED PHYSICS | - |
dc.subject | SPIKING NEURONS | - |
dc.subject | NETWORKS | - |
dc.title | Integrate-and-fire neuron circuit using positive feedback field effect transistor for low power operation | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000448317300018 | - |
dc.identifier.doi | 10.1063/1.5031929 | - |
dc.identifier.bibliographicCitation | JOURNAL OF APPLIED PHYSICS, v.124, no.15 | - |
dc.identifier.scopusid | 2-s2.0-85054003218 | - |
dc.citation.title | JOURNAL OF APPLIED PHYSICS | - |
dc.citation.volume | 124 | - |
dc.citation.number | 15 | - |
dc.contributor.affiliatedAuthor | Cho, Seongjae | - |
dc.type.docType | Article | - |
dc.subject.keywordPlus | SPIKING NEURONS | - |
dc.subject.keywordPlus | NETWORKS | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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