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Dual gate positive feedback field-effect transistor for low power analog circuit
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kwon, M.-W. | - |
| dc.contributor.author | Hwang, S. | - |
| dc.contributor.author | Baek, M.-H. | - |
| dc.contributor.author | Cho, S. | - |
| dc.contributor.author | Park, B.-G. | - |
| dc.date.available | 2020-02-27T20:43:06Z | - |
| dc.date.created | 2020-02-12 | - |
| dc.date.issued | 2017 | - |
| dc.identifier.issn | 0000-0000 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/6707 | - |
| dc.description.abstract | In this work, we investigate the dual gate positive feedback field-effect transistor (FBFET) using DC and transient TCAD simulation. I-V characteristics, subthreshold swing, and transient characteristics are analyzed. The FBFET has steep switching property and low off current. We design an inverter that can low power operate with the FBFET. By using the FBFET, the stand-by current is effectively suppressed in analog circuit. © 2017 JSAP. | - |
| dc.language | 영어 | - |
| dc.language.iso | en | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.relation.isPartOf | 2017 Silicon Nanoelectronics Workshop, SNW 2017 | - |
| dc.subject | Analog circuits | - |
| dc.subject | Field effect transistors | - |
| dc.subject | Low power electronics | - |
| dc.subject | Nanoelectronics | - |
| dc.subject | Timing circuits | - |
| dc.subject | Dual gates | - |
| dc.subject | IV characteristics | - |
| dc.subject | Low Power | - |
| dc.subject | Off current | - |
| dc.subject | Subthreshold swing | - |
| dc.subject | Switching properties | - |
| dc.subject | TCAD simulation | - |
| dc.subject | Transient characteristic | - |
| dc.subject | Feedback | - |
| dc.title | Dual gate positive feedback field-effect transistor for low power analog circuit | - |
| dc.type | Article | - |
| dc.type.rims | ART | - |
| dc.description.journalClass | 1 | - |
| dc.identifier.doi | 10.23919/SNW.2017.8242324 | - |
| dc.identifier.bibliographicCitation | 2017 Silicon Nanoelectronics Workshop, SNW 2017, v.2017-January, pp.115 - 116 | - |
| dc.identifier.scopusid | 2-s2.0-85051039210 | - |
| dc.citation.endPage | 116 | - |
| dc.citation.startPage | 115 | - |
| dc.citation.title | 2017 Silicon Nanoelectronics Workshop, SNW 2017 | - |
| dc.citation.volume | 2017-January | - |
| dc.contributor.affiliatedAuthor | Cho, S. | - |
| dc.type.docType | Conference Paper | - |
| dc.subject.keywordPlus | Analog circuits | - |
| dc.subject.keywordPlus | Field effect transistors | - |
| dc.subject.keywordPlus | Low power electronics | - |
| dc.subject.keywordPlus | Nanoelectronics | - |
| dc.subject.keywordPlus | Timing circuits | - |
| dc.subject.keywordPlus | Dual gates | - |
| dc.subject.keywordPlus | IV characteristics | - |
| dc.subject.keywordPlus | Low Power | - |
| dc.subject.keywordPlus | Off current | - |
| dc.subject.keywordPlus | Subthreshold swing | - |
| dc.subject.keywordPlus | Switching properties | - |
| dc.subject.keywordPlus | TCAD simulation | - |
| dc.subject.keywordPlus | Transient characteristic | - |
| dc.subject.keywordPlus | Feedback | - |
| dc.description.journalRegisteredClass | scopus | - |
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Related Researcher
- Cho, Seong Jae
- IT (Major of Electronic Engineering)