Effect of channel thickness on the electrical performance and the stability of amorphous SiZnSnO thin film transistor
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Byun, Jae Min | - |
dc.contributor.author | Lee, Sang Yeol | - |
dc.date.available | 2020-10-20T06:41:36Z | - |
dc.date.created | 2020-08-25 | - |
dc.date.issued | 2020-10 | - |
dc.identifier.issn | 1369-8001 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/78452 | - |
dc.description.abstract | The electrical performance and the stability of amorphous SiZnSnO (a-SZTO) thin film transistors (TFTs) were investigated depending on the channel thickness. The channel thickness was changed from 27 nm to 108 nm, systematically. As the channel thickness increased, the threshold voltage (V-TH) of a-SZTO shifted to the positive direction, from 2.13 to 4.59 V. The negative bias temperature stress test (NBTS) was measured at -20 V for 120 min to determine the stability of a-SZTO TFTs at 60 degrees C. The Delta V-TH was changed only 2.02 Vat 27 nm because of less total trap density in the channel layer. The mechanism of stability change depending on the thickness is explained. Transmission line method (TLM) was also used to find the relation between the total resistance (R-Total) and the channel thickness. As increasing the channel thickness, the contact resistance (R-C) increased and sheet resistance (R-sh) decreased. It must be considered the channel thickness of a-SZTO channel layer for the electrical properties and stability. Finally, we made the depletion load type inverter using two transistors of different channel thickness. The achieved voltage gain of the inverter is 21.962 V/V at the V-DD = 11 V. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | ELSEVIER SCI LTD | - |
dc.relation.isPartOf | MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING | - |
dc.title | Effect of channel thickness on the electrical performance and the stability of amorphous SiZnSnO thin film transistor | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000541163300020 | - |
dc.identifier.doi | 10.1016/j.mssp.2020.105183 | - |
dc.identifier.bibliographicCitation | MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, v.117 | - |
dc.description.isOpenAccess | N | - |
dc.citation.title | MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING | - |
dc.citation.volume | 117 | - |
dc.contributor.affiliatedAuthor | Lee, Sang Yeol | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Amorphous oxide semiconductor thin film transistors | - |
dc.subject.keywordAuthor | Amorphous silicon-zinc-tin-oxide | - |
dc.subject.keywordAuthor | Negative bias temperature stress test | - |
dc.subject.keywordAuthor | Transmission line method | - |
dc.subject.keywordAuthor | Depletion load type inverter | - |
dc.subject.keywordPlus | OXIDE SEMICONDUCTOR | - |
dc.subject.keywordPlus | TEMPERATURE | - |
dc.subject.keywordPlus | LAYER | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
1342, Seongnam-daero, Sujeong-gu, Seongnam-si, Gyeonggi-do, Republic of Korea(13120)031-750-5114
COPYRIGHT 2020 Gachon University All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.