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High Performance Dual Gate Blue Laser Annealed Poly-Si Thin-Film Transistor for High-Resolution Displays

Authors
Jeong, Duk YoungBillah, Mohammad MasumSiddik, Abu BakarHan, ByungjuChang, YeoungjinJang, Jin
Issue Date
Aug-2021
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Blue laser annealing (BLA); coplanar thin-film transistor (TFT); low temperature polysilicon (LTPS); technology computer-aided design (TCAD)
Citation
IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.8, pp.3863 - 3869
Journal Title
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume
68
Number
8
Start Page
3863
End Page
3869
URI
https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/81843
DOI
10.1109/TED.2021.3091965
ISSN
0018-9383
Abstract
We report a dual gate (DG), low-temperature polysilicon (LTPS) thin-film transistor ( TFT) using blue laser annealing (BLA) of amorphous silicon. The DG TFTs with variable bottom gate lengths (LBG) from 2 to 8 mu m and a fixed top gate length (LTG) of 6 mu m are investigated. The drain currents of the DG LTPS TFT with LBG > LTG by 2 mu m under DG sweep (DS) are similar to 4.3 times those of the single gate TFT. The high carrier concentrations (similar to 10(19) cm(-3)) at both interfaces (top gate insulator(GI)/poly-Si and poly-Si/bottom GI) under DS is confirmed by technology computer-aided design (TCAD) simulation, which might lead to high drain currents. The poly-Si layer exhibits no grain boundary protrusion from the transmission electron microscopy (TEM) cross-sectionalmicrograph and thus induces a strong bulk accumulation effect under DS. The fabricated DG TFT-based ring oscillator (RO) and shift register (SR) exhibit an excellent oscillation frequency of 15.8MHz, fast- rising and falling time of 370 and 366 ns at a driving voltage of -10 V, respectively.
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Chang, Yeoung Jin
반도체대학 (Department of Semiconductor & Display)
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