Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors
DC Field | Value | Language |
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dc.contributor.author | Choi, Junhwan | - |
dc.contributor.author | Lee, Changhyeon | - |
dc.contributor.author | Lee, Chungryeol | - |
dc.contributor.author | Park, Hongkeun | - |
dc.contributor.author | Lee, Seung Min | - |
dc.contributor.author | Kim, Chang-Hyun | - |
dc.contributor.author | Yoo, Hocheon | - |
dc.contributor.author | Im, Sung Gap | - |
dc.date.accessioned | 2022-05-23T03:40:09Z | - |
dc.date.available | 2022-05-23T03:40:09Z | - |
dc.date.created | 2022-05-23 | - |
dc.date.issued | 2022-04 | - |
dc.identifier.issn | 2041-1723 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/84396 | - |
dc.description.abstract | Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to control the channel conductance systematically, thus realizing the stabilized T-inverter operation. The 3-dimensional (3D) T-inverter is fabricated in a vertically stacked form based on all-dry processes, which enables the high-density integration with high device uniformity. In the flash memory, ultrathin polymer dielectrics are utilized to reduce the programming/erasing voltage as well as operating voltage. With the optimum programming state, the 3D T-inverter fulfills all the important requirements such as full-swing operation, optimum intermediate logic value (similar to V-DD/2), high DC gain exceeding 20 V/V as well as low-voltage operation (< 5 V). The organic flash memory exhibits long retention characteristics (current change less than 10% after 10(4)s), leading to the long-term stability of the 3D T-inverter. We believe the 3D T-inverter employing flash memory developed in this study can provide a useful insight to achieve high-performance MVL circuits. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | NATURE RESEARCH | - |
dc.relation.isPartOf | NATURE COMMUNICATIONS | - |
dc.title | Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000788852000031 | - |
dc.identifier.doi | 10.1038/s41467-022-29756-w | - |
dc.identifier.bibliographicCitation | NATURE COMMUNICATIONS, v.13, no.1 | - |
dc.description.isOpenAccess | Y | - |
dc.identifier.scopusid | 2-s2.0-85128962272 | - |
dc.citation.title | NATURE COMMUNICATIONS | - |
dc.citation.volume | 13 | - |
dc.citation.number | 1 | - |
dc.contributor.affiliatedAuthor | Kim, Chang-Hyun | - |
dc.contributor.affiliatedAuthor | Yoo, Hocheon | - |
dc.type.docType | Article | - |
dc.subject.keywordPlus | THIN-FILM TRANSISTORS | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | POLYMER SEMICONDUCTOR | - |
dc.subject.keywordPlus | MULTIVALUED LOGIC | - |
dc.subject.keywordPlus | DIELECTRIC LAYER | - |
dc.subject.keywordPlus | HIGH-K | - |
dc.subject.keywordPlus | PERFORMANCE | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | FABRICATION | - |
dc.subject.keywordPlus | DESIGN | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalWebOfScienceCategory | Multidisciplinary Sciences | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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