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Dependency of Spiking Behaviors of an Integrate-and-fire Neuron Circuit on Shunt Capacitor

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dc.contributor.authorShah, Arati Kumari-
dc.contributor.authorCho, Eou-Sik-
dc.contributor.authorShin, Hyungsoon-
dc.contributor.authorCho, Seongjae-
dc.date.accessioned2023-08-13T02:41:05Z-
dc.date.available2023-08-13T02:41:05Z-
dc.date.created2023-08-13-
dc.date.issued2023-06-
dc.identifier.issn1598-1657-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/88747-
dc.description.abstractintegrate-and-fire (I & F) neuron circuit effectively integrates input currents with a small magnitude onto a membrane capacitor until a threshold is reached in hardware spiking neural network (SNN). I & F neuron circuits can be adopted in the large-scale array of synaptic devices to convert analog inputs to a digital output for altering the synaptic weights. The area occupied by the neuron circuits needs to be reduced and the sizes of capacitors can be controlled for the goal. In this study, an effort is made for improving the area efficiency of an I & F neuron circuit by controlling the shunt capacitor through a series of circuit simulations. 0.35 & mu;m technology has been assumed to be utilized for designing the neuron circuits in variation with shunt capacitor. In the end, the dependence of spiking behaviors of an I & F neuron circuit on the area control over capacitors is closely examined.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEK PUBLICATION CENTER-
dc.relation.isPartOfJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE-
dc.titleDependency of Spiking Behaviors of an Integrate-and-fire Neuron Circuit on Shunt Capacitor-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid001030895600002-
dc.identifier.doi10.5573/JSTS.2023.23.3.189-
dc.identifier.bibliographicCitationJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.23, no.3, pp.189 - 195-
dc.identifier.kciidART002967680-
dc.description.isOpenAccessN-
dc.identifier.scopusid2-s2.0-85165448034-
dc.citation.endPage195-
dc.citation.startPage189-
dc.citation.titleJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE-
dc.citation.volume23-
dc.citation.number3-
dc.contributor.affiliatedAuthorShah, Arati Kumari-
dc.contributor.affiliatedAuthorCho, Eou-Sik-
dc.type.docTypeArticle-
dc.subject.keywordAuthorIntegrate-and-fire (I &amp-
dc.subject.keywordAuthorF)-
dc.subject.keywordAuthorneuron circuit-
dc.subject.keywordAuthorspiking neural network (SNN)-
dc.subject.keywordAuthormembrane capacitor-
dc.subject.keywordAuthorshunt capacitor-
dc.subject.keywordPlusNETWORKS-
dc.subject.keywordPlusMEMORY-
dc.subject.keywordPlusMODEL-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.description.journalRegisteredClasskci-
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반도체대학 (반도체·전자공학부)
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