ScholarWorks@Hanyang University

Browsing by Park, YoonsooAuthor

All A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

Showing results 1 to 1 of 1

SCOPUS
WDP: A Weighted Delay Prediction Method for Integrated Circuit InterconnectsGo to Link

Park, Yoonsoo; Hong, Song nam; Han, Jaeduk

ArticleIssue Date2025Citation21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025, pp 1 - 4PublisherInstitute of Electrical and Electronics Engineers Inc.
1
CONTACT US

RSS_1.0 RSS_2.0 ATOM_1.0

222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1366

COPYRIGHT © 2024 HANYANG UNIVERSITY.

Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.

BROWSE

한국어