Enhancement of the Electrical Characteristics for 3D NAND Flash Memory Devices Due to a Modified Cell Structure in the Gate Region

Abstract

The effect of a modified cell structure in the gate region on the electrical characteristics of three-dimensional (3D) NAND flash memory devices was investigated by using a technology computer-aided design simulation. The interference in the memory devices induced by the pass voltage (V-pass) was significantly affected depending on the cell size. The V-pass interference of 3D NAND flash memory device with a modified cell structure was reduced due to an increase in the electron density of the inversion layer in comparison with conventional 3D flash memory devices, and their program operation was enhanced by the increased electric field. Furthermore, the program/erase margin of the proposed 3D NAND flash memory device was 15% larger than that of the conventional 3D NAND flash memory device.