High-speed StrongARM-latch-based Bang-bang Phase Detector in 40-nm CMOS Technology

Abstract

This paper presents a high-speed strongARM-latch-based bang-bang phase detector (PD). Instead of using D-flipflops (DFF) or D-latches, which are used in conventional bang-bang PDs, strongARM latches are used to achieve high sensitivity owing to their regeneration behaviors. By comparing the clock-To-Q delay(tcq) and maximum data rate of conventional and proposed phase detectors, it is found that the proposed strongARM-latch-based bang-bang PD has a smaller clock-To-Q delay and a higher data rate.