Operation Principles of ZnO/Al2O3-AlDMP/ZnO Stacked-Channel Ternary Thin-Film Transistor
- Authors
- Kim, So-Young; Kim, Kiyung; Kim, A. Reum; Lee, Ho-In; Lee, Yongsu; Kim, Seung-Mo; Yu, Sung Ho; Lee, Hae-Won; Hwang, Hyeon Jun; Sung, Myung Mo; Lee, Byoung Hun
- Issue Date
- Jun-2021
- Publisher
- WILEY
- Keywords
- multi‐; valued logic devices; stacked‐; channel devices; ternary inverters; thin‐; film transistors; zinc oxide
- Citation
- ADVANCED ELECTRONIC MATERIALS, v.7, no.6, pp.1 - 7
- Indexed
- SCIE
SCOPUS
- Journal Title
- ADVANCED ELECTRONIC MATERIALS
- Volume
- 7
- Number
- 6
- Start Page
- 1
- End Page
- 7
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/141811
- DOI
- 10.1002/aelm.202100247
- ISSN
- 2199-160X
- Abstract
- For many decades, novel devices demonstrating step-wise current-voltage characteristic at room temperature have been pursued to realize multi-valued logic computing that has significant advantages such as extremely low power consumption and high-density information-processing capability. Recently, a novel ternary logic transistor has been constructed using an ultrathin ZnO/Al2O3-AlDMP/ZnO channel exhibiting a mobility edge-quantized conduction for the intermediate current level. This study investigates the operation principle of the ternary device using ZnO/Al2O3-AlDMP/ZnO stack and concludes that the first ZnO layer controls the level of the intermediate current, while the second ZnO layer controls the threshold voltage of the ternary device. These controllable electrical properties of the intermediate state of the ternary device have been applied to an n-type resistive-load standard ternary inverter, demonstrating the feasibility to achieve a ternary logic circuit consuming extremely low power with an optimal noise margin.
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