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CMOS-compatible Si metasurface at visible wavelengths prepared by low-temperature green laser annealing

Authors
Lee, Jeong YubKim, YongsungHan, SeunghoonKim, JaekwanYoon, Jae WoongLee, Ki YoungSong, Seok HoYang, KiyeonLee, Chang Seung
Issue Date
Jan-2019
Publisher
IOP PUBLISHING LTD
Keywords
poly-silicon metasurface; submicron-pixel color filter; green laser annealing crystallization; low light absorption; CMOS-compatibility
Citation
NANOTECHNOLOGY, v.30, no.4, pp.1 - 10
Indexed
SCIE
SCOPUS
Journal Title
NANOTECHNOLOGY
Volume
30
Number
4
Start Page
1
End Page
10
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/148555
DOI
10.1088/1361-6528/aaecbd
ISSN
0957-4484
Abstract
A low-temperature laser crystallization is newly devised for producing polycrystalline silicon (poly-Si) thin films of low-loss, low surface roughness enough for nanoscale patterning, applicable to practical Si metasurface elements on complementary metal-oxide semiconductor (CMOS) electronic architectures in visible lights. The method is based on dielectric encapsulation of an amorphous Si film and subsequent laser-induced local crystallization. Such poly-Si thin film yields order-of-magnitude smaller surface roughness and grain size than those obtained with the conventional laser annealing processes. The mechanism of the formation of small and uniform crystalline grains during solidification is studied to ensure the smooth surfaces enough for nanoscale patterning. By obtaining root mean square of surface roughness <2.49 nm and extinction coefficient <4.8 x 10(-2) at 550 nm, visible metasurface color-filter elements are experimentally demonstrated with the resonant transmission-peak efficiency approaching similar to 85%. This low-loss poly-Si metasurface is favorably compatible with embedded CMOS electronic architectures in contrast to the conventional thermal annealing processes that often cause failure of electrical device functionalities due to delamination and material-property degradation problems. The proposed fabrication in this study provides a practical method for further development of various Si metasurfaces in the visible domain and their integration with CMOS electronic devices as well.
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