Electrical Characteristics of WSi2 Nanocrystal Capacitors with Barrier-Engineered High-k Tunnel Layers
- Authors
- Lee, Hyo Jun; Lee, Dong Uk; Kim, Eun Kyu; You, Hee-Wook; Cho, Won-Ju
- Issue Date
- Jun-2011
- Publisher
- IOP Publishing Ltd
- Citation
- Japanese Journal of Applied Physics, v.50, no.6, pp 1 - 4
- Pages
- 4
- Indexed
- SCI
SCIE
SCOPUS
- Journal Title
- Japanese Journal of Applied Physics
- Volume
- 50
- Number
- 6
- Start Page
- 1
- End Page
- 4
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/151288
- DOI
- 10.1143/JJAP.50.06GF13
- ISSN
- 0021-4922
1347-4065
- Abstract
- Nanocrystal-floating gate capacitors with WSi2 nanocrystals and high-k tunnel layers were fabricated to improve the electrical properties such as retention, programming/erasing speed, and endurance. The WSi2 nanocrystals were distributed uniformly between the tunnel and control gate oxide layers. The electrical performance of the tunnel barrier with the SiO2/HfO2/Al2O3 (2/1/3 nm) (OHA) tunnel layer appeared to be better than that with the Al2O3/HfO2/Al2O3 (2/1/3 nm) (AHA) tunnel layer. When Delta V-FB is about 1 V after applying voltage at +/- 8 V, the programming/erasing speeds of AHA and OHA tunnel layers are 300 ms and 500 mu s, respectively. In particular, the device with WSi2 nanocrystals and the OHA tunnel barrier showed a large memory window of about 7.76 V when the voltage swept from 10 to -10 V, and it was maintained at about 2.77 V after 10(4) cycles.
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