Efficient GPU multitasking with latency minimization and cache boosting
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Jiho | - |
dc.contributor.author | Chu, Minsung | - |
dc.contributor.author | Park, Yongjun | - |
dc.date.accessioned | 2022-07-14T07:23:00Z | - |
dc.date.available | 2022-07-14T07:23:00Z | - |
dc.date.created | 2021-05-14 | - |
dc.date.issued | 2017-04 | - |
dc.identifier.issn | 1349-2543 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/152495 | - |
dc.description.abstract | GPU spatial multitasking has been proven to be quite effective at executing different applications concurrently using SM partitioning. However, while it maximizes total throughput, latency-critical applications often cannot meet their deadlines due to the increased execution time. Furthermore, SM partitioning cannot allocate the appropriate L1 cache size per kernel. To solve these problems, this paper proposes a new application-aware resource allocation framework called GPU Fine-Tuner, for assigning appropriate resources to GPU kernels. To minimize the execution time of latency-constrained applications, it assigns them more SMs when performance is not affected. It also increases the cache size of SMs for cache-sensitive kernels using resource borrowing from neighbors for cache-insensitive kernels. Experimental results show that the Fine-Tuner outperforms GPU spatial multitasking with up to 15% less average latency without performance degradation. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
dc.title | Efficient GPU multitasking with latency minimization and cache boosting | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Park, Yongjun | - |
dc.identifier.doi | 10.1587/elex.14.20161158 | - |
dc.identifier.scopusid | 2-s2.0-85017436869 | - |
dc.identifier.wosid | 000401173400003 | - |
dc.identifier.bibliographicCitation | IEICE ELECTRONICS EXPRESS, v.14, no.7, pp.1 - 12 | - |
dc.relation.isPartOf | IEICE ELECTRONICS EXPRESS | - |
dc.citation.title | IEICE ELECTRONICS EXPRESS | - |
dc.citation.volume | 14 | - |
dc.citation.number | 7 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 12 | - |
dc.type.rims | ART | - |
dc.type.docType | 정기학술지(Article(Perspective Article포함)) | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | Y | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Engineering | - |
dc.subject.keywordAuthor | GPGPU | - |
dc.subject.keywordAuthor | multitasking | - |
dc.subject.keywordAuthor | energy | - |
dc.subject.keywordAuthor | resource sharing | - |
dc.subject.keywordAuthor | workload balancing | - |
dc.identifier.url | https://www.jstage.jst.go.jp/article/elex/14/7/14_14.20161158/_article | - |
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