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Multilevel characteristics and operating mechanisms of nonvolatile memory devices based on a floating gate of graphene oxide sheets sandwiched between two polystyrene layers

Authors
Kim, Yu NaLee, Nam HyunYun, Dong YeolKim, Tae Whan
Issue Date
Oct-2015
Publisher
ELSEVIER
Keywords
Nonvolatile memory devices; Graphene oxide; Polystyrene; C-V hysteresis; Multilevel
Citation
ORGANIC ELECTRONICS, v.25, pp.165 - 169
Indexed
SCIE
SCOPUS
Journal Title
ORGANIC ELECTRONICS
Volume
25
Start Page
165
End Page
169
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/156212
DOI
10.1016/j.orgel.2015.06.028
ISSN
1566-1199
Abstract
Nonvolatile organic memory devices were fabricated utilizing a graphene oxide (GO) layer embedded between two polystyrene (PS) layers. Scanning electron microscope images of GO sheets sandwiched between two PS layers showed that the GO sheets were clearly embedded in the PS layers. Capacitance-voltage (C-V) curves of the Al/PS/GO/PS/n-type Si devices clearly showed hysteresis behaviors with multilevel characteristics. The window margin of the nonvolatile memory devices increased from 1 to 7 V with increasing applied sweep voltages from 6 to 32 V. The cycling retention of the ON/OFF switching for the devices was measured by applying voltages between +15 and -15 V. While the capacitance of the memory devices at an ON state have retained as 230 pF up to 10(4) cycles, that at an OFF state maintained as 16 pF during three times of repeated measurements. The extrapolation of the retention data for the devices maintained up to 10(6) cycles. The operating mechanisms of the nonvolatile organic memory devices with a floating gate were described by the C-V results and the energy band diagrams.
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