Analysis of various DRAM devices from power consumption's perspective
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jeon, Dong-Ik | - |
dc.contributor.author | Lee, Min-Kyu | - |
dc.contributor.author | Chung, Ki-Seok | - |
dc.date.accessioned | 2022-07-15T21:40:55Z | - |
dc.date.available | 2022-07-15T21:40:55Z | - |
dc.date.created | 2021-05-13 | - |
dc.date.issued | 2015-08 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/156617 | - |
dc.description.abstract | DRAM has become a crucial component in terms of system power consumption as the size of main memory increases. To improve power efficiency of DRAM devices, we need to analyze characteristics of DRAM behavior from power consumption's perspective. In this paper, we analyze the characteristics of various DRAM devices from major vendors under real system operating environment. As the size of the DRAM increases, power consumption due to activate, precharge and burst operations remains about the same, but that due to background and refresh operations increases steadily. Especially, power consumption due to the refresh operation for 3D stacked DRAMs increases by 91% at high temperatures, which strongly implies that the refresh operation will become more crucial for DRAMs in the future. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | Analysis of various DRAM devices from power consumption's perspective | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Chung, Ki-Seok | - |
dc.identifier.doi | 10.1109/NAS.2015.7255229 | - |
dc.identifier.scopusid | 2-s2.0-84960850915 | - |
dc.identifier.bibliographicCitation | Proceedings of the 2015 IEEE International Conference on Networking, Architecture and Storage, NAS 2015, pp.359 - 360 | - |
dc.relation.isPartOf | Proceedings of the 2015 IEEE International Conference on Networking, Architecture and Storage, NAS 2015 | - |
dc.citation.title | Proceedings of the 2015 IEEE International Conference on Networking, Architecture and Storage, NAS 2015 | - |
dc.citation.startPage | 359 | - |
dc.citation.endPage | 360 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Electric power utilization | - |
dc.subject.keywordPlus | Energy efficiency | - |
dc.subject.keywordPlus | Memory architecture | - |
dc.subject.keywordPlus | Three dimensional integrated circuits | - |
dc.subject.keywordPlus | 3d-stacked drams | - |
dc.subject.keywordPlus | Analysis of various | - |
dc.subject.keywordPlus | High temperature | - |
dc.subject.keywordPlus | Main memory | - |
dc.subject.keywordPlus | Operating environment | - |
dc.subject.keywordPlus | Power analysis | - |
dc.subject.keywordPlus | Power efficiency | - |
dc.subject.keywordPlus | refresh | - |
dc.subject.keywordPlus | Dynamic random access storage | - |
dc.subject.keywordAuthor | DRAM | - |
dc.subject.keywordAuthor | main memory | - |
dc.subject.keywordAuthor | power analysis | - |
dc.subject.keywordAuthor | refresh | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/7255229 | - |
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