Cited 0 time in
Quality of Service-Aware Dynamic Voltage and Frequency Scaling for Embedded GPUs
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | You, Daecheol | - |
| dc.contributor.author | Chung, Ki-Seok | - |
| dc.date.accessioned | 2022-07-16T01:03:01Z | - |
| dc.date.available | 2022-07-16T01:03:01Z | - |
| dc.date.issued | 2015-01 | - |
| dc.identifier.issn | 1556-6056 | - |
| dc.identifier.issn | 1556-6064 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/158169 | - |
| dc.description.abstract | Dynamic voltage and frequency scaling (DVFS) is a key technique for reducing processor power consumption in mobile devices. In recent years, mobile system-on-chips (SoCs) has supported DVFS for embedded graphics processing units (GPUs) as the processing power of embedded GPUs has been increasing steadlily. The major challenge of applying DVFS to a processing unit is to meet the quality of service (QoS) requirement while achieving a reasonable power reduction. In the case of GPUs, the QoS requirement can be specified as the frame-per-second (FPS) which the target GPU should achieve. The proposed DVFS technique ensures a consistent GPU performance by scaling the operating clock frequency in a way that it maintains a uniform FPS. | - |
| dc.format.extent | 4 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers | - |
| dc.title | Quality of Service-Aware Dynamic Voltage and Frequency Scaling for Embedded GPUs | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/LCA.2014.2319079 | - |
| dc.identifier.scopusid | 2-s2.0-84932612238 | - |
| dc.identifier.wosid | 000356718700017 | - |
| dc.identifier.bibliographicCitation | IEEE Computer Architecture Letters, v.14, no.1, pp 66 - 69 | - |
| dc.citation.title | IEEE Computer Architecture Letters | - |
| dc.citation.volume | 14 | - |
| dc.citation.number | 1 | - |
| dc.citation.startPage | 66 | - |
| dc.citation.endPage | 69 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
| dc.subject.keywordPlus | Computer graphics | - |
| dc.subject.keywordPlus | Computer graphics equipment | - |
| dc.subject.keywordPlus | Dynamic frequency scaling | - |
| dc.subject.keywordPlus | Electric power supplies to apparatus | - |
| dc.subject.keywordPlus | Image coding | - |
| dc.subject.keywordAuthor | Graphics processors | - |
| dc.subject.keywordAuthor | hardware/software interfaces | - |
| dc.subject.keywordAuthor | low-power design | - |
| dc.subject.keywordAuthor | energy-aware systems | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/6808482 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1366
COPYRIGHT © 2024 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.
