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Multilevel charging and discharging mechanisms of nonvolatile memory devices based on nanocomposites consisting of monolayered Au nanoparticles embedded in a polystyrene layer
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Yun, Dong Yeol | - |
| dc.contributor.author | Lee, Nam Hyun | - |
| dc.contributor.author | Kim, Hak Seong | - |
| dc.contributor.author | Lee, Sang Wook | - |
| dc.contributor.author | Kim, Tae Whan | - |
| dc.date.accessioned | 2022-07-16T06:31:08Z | - |
| dc.date.available | 2022-07-16T06:31:08Z | - |
| dc.date.issued | 2014-01 | - |
| dc.identifier.issn | 0003-6951 | - |
| dc.identifier.issn | 1077-3118 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/160956 | - |
| dc.description.abstract | Capacitance-voltage (C-V) curves for Al/Au nanoparticles embedded in a polystyrene (PS) layer/p-Si devices at 300 K showed a metal-insulator-semiconductor behavior with flat-band voltage shifts of the C-V curves due to the existence of charge trapping. Memory windows between 2.6 and 9.9 V were observed at different sweep voltages, indicative of multilevel behavior. Capacitance-time measurements demonstrated that the charge-trapping capability of Au nanoparticles embedded in a PS layer was maintained for retention times larger than 1 x 10(4) s without significant degradation. The multilevel charging and discharging mechanisms of the memory devices are described on the basis of the experimental results. | - |
| dc.format.extent | 3 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | American Institute of Physics | - |
| dc.title | Multilevel charging and discharging mechanisms of nonvolatile memory devices based on nanocomposites consisting of monolayered Au nanoparticles embedded in a polystyrene layer | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1063/1.4861928 | - |
| dc.identifier.scopusid | 2-s2.0-84893113604 | - |
| dc.identifier.wosid | 000330431000111 | - |
| dc.identifier.bibliographicCitation | Applied Physics Letters, v.104, no.2, pp 1 - 3 | - |
| dc.citation.title | Applied Physics Letters | - |
| dc.citation.volume | 104 | - |
| dc.citation.number | 2 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.endPage | 3 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | sci | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Physics | - |
| dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
| dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
| dc.subject.keywordPlus | LIGHT-EMITTING-DIODES | - |
| dc.subject.keywordPlus | FLASH MEMORY | - |
| dc.subject.keywordPlus | GATE | - |
| dc.identifier.url | https://aip.scitation.org/doi/10.1063/1.4861928 | - |
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