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Charge loss in WSi2 nanocrystals nonvolatile memory with SiO2/Si3N4/SiO2 tunnel layer

Authors
Lee, Dong UkLee, Hyo JunKim, Eun KyuYou, Hee-WookCho, Won-Ju
Issue Date
Mar-2011
Publisher
ELSEVIER
Keywords
Nanocrystal; Non-volatile memory; WSi2; Quantum dots
Citation
CURRENT APPLIED PHYSICS, v.11, no.2, pp.E6 - E9
Indexed
SCIE
SCOPUS
KCI
Journal Title
CURRENT APPLIED PHYSICS
Volume
11
Number
2
Start Page
E6
End Page
E9
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/168938
DOI
10.1016/j.cap.2010.12.036
ISSN
1567-1739
Abstract
We have studied the charge loss in WSi2 nanocrystals nonvolatile memory device with silicon oxide-nitride-oxide (SiO2: 2 nm/Si3N4:2 nm/SiO2:3 nm) tunnel layer. The WSi2 nanocrystals of 2.5 nm diameters and 3.6 x 10(12) cm(-2) density were formed between tunnel and control oxide layers. When the programming/erasing voltages were applied at 10 V/-10 V during 500 ms, the memory window was measured about 2.7 V and maintained at about 1.1 V after 10(4) s at 25 degrees C. In this device, the activation energies for the charge loss rates from 10% to 50% in compare to an initial charge were about 0.14 eV. This charge loss could be caused by a cycling-induced oxide damage or tunnel oxide break down. Therefore, it has a feasibility of application to highly-integrate nonvolatile memory after optimize the charge loss effect by thermal stress and improve the tunnel layer stability.
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