Optimization of RunBefore decoder and first one detector for MPEG-4 AVC/H.264 CAVLC decoding
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, S.-J. | - |
dc.contributor.author | Park, J.-Y. | - |
dc.contributor.author | Chung, Ki Seok | - |
dc.date.accessioned | 2022-10-07T09:40:18Z | - |
dc.date.available | 2022-10-07T09:40:18Z | - |
dc.date.created | 2022-09-16 | - |
dc.date.issued | 2008-12 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/171736 | - |
dc.description.abstract | In this paper, we propose a novel RunBefore decoder and a new FOD (First One Detector) for MPEG-4 AVC/H.264 CAVLC decoding. By reusing common blocks aggressively, the proposed FOD has smaller area and less power consumption. Also a new RunBefore decoder which decodes two values in one clock has been designed to improve the decoding performance. The proposed CA VLC decoder has been designed in Verilog HDL, and synthesized by Synopsys' Design Compiler using MagnaChip 0.18μm CMOS cell library. Performance evaluation results show that our design has on average 48% faster than conventional designs. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.title | Optimization of RunBefore decoder and first one detector for MPEG-4 AVC/H.264 CAVLC decoding | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Chung, Ki Seok | - |
dc.identifier.doi | 10.1109/ICED.2008.4786754 | - |
dc.identifier.scopusid | 2-s2.0-63649117706 | - |
dc.identifier.bibliographicCitation | 2008 International Conference on Electronic Design, ICED 2008, pp.1 - 5 | - |
dc.relation.isPartOf | 2008 International Conference on Electronic Design, ICED 2008 | - |
dc.citation.title | 2008 International Conference on Electronic Design, ICED 2008 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 5 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Design | - |
dc.subject.keywordPlus | Motion Picture Experts Group standards | - |
dc.subject.keywordPlus | AVC/H.264 | - |
dc.subject.keywordPlus | Cmos cell libraries | - |
dc.subject.keywordPlus | Conventional designs | - |
dc.subject.keywordPlus | Decoding performance | - |
dc.subject.keywordPlus | Design compilers | - |
dc.subject.keywordPlus | Performance evaluations | - |
dc.subject.keywordPlus | Power consumption | - |
dc.subject.keywordPlus | Synopsys | - |
dc.subject.keywordPlus | Verilog HDL | - |
dc.subject.keywordPlus | Decoding | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/4786754 | - |
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