Using non-volatile RAM as a write buffer for NAND flash memory-based storage devices
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Sungmin | - |
dc.contributor.author | Jung, Hoyoung | - |
dc.contributor.author | Shim, Hyoki | - |
dc.contributor.author | Kang, Sooyong | - |
dc.contributor.author | Cha, Jaehyuk | - |
dc.date.accessioned | 2022-10-07T10:01:34Z | - |
dc.date.available | 2022-10-07T10:01:34Z | - |
dc.date.created | 2022-09-16 | - |
dc.date.issued | 2008-09 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/171848 | - |
dc.description.abstract | Recent development of next generation non-volatile memory types such as MRAM, FeRAM and PRAM provide higher commercial value to Non-Volatile RAM (NVRAM). In this paper, we suggest the utilization of small-sized, nextgeneration NVRAM as a write buffer to improve the overall performance of NAND flash memory-based storage systems. We propose a novel block-based NVRAM write buffer management policy, CLC. Simulation results show that the CLC policy outperforms the traditional policies. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.title | Using non-volatile RAM as a write buffer for NAND flash memory-based storage devices | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kang, Sooyong | - |
dc.contributor.affiliatedAuthor | Cha, Jaehyuk | - |
dc.identifier.doi | 10.1109/MASCOT.2008.4770591 | - |
dc.identifier.scopusid | 2-s2.0-65949107854 | - |
dc.identifier.bibliographicCitation | 2008 IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, MASCOTS, pp.1 - 3 | - |
dc.relation.isPartOf | 2008 IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, MASCOTS | - |
dc.citation.title | 2008 IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, MASCOTS | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 3 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Buffer management | - |
dc.subject.keywordPlus | NAND flash memory | - |
dc.subject.keywordPlus | Non-volatile memories | - |
dc.subject.keywordPlus | Non-volatile rams | - |
dc.subject.keywordPlus | Simulation result | - |
dc.subject.keywordPlus | Storage devices | - |
dc.subject.keywordPlus | Storage systems | - |
dc.subject.keywordPlus | Buffer storage | - |
dc.subject.keywordPlus | Computer networks | - |
dc.subject.keywordPlus | NAND circuits | - |
dc.subject.keywordPlus | Random access storage | - |
dc.subject.keywordPlus | Flash memory | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/4770591 | - |
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