Characteristics of nano floating gate memory with Au nano-particles and SiON dielectrics

Abstract

We fabricated the floating gated non-volatile memory devices with Au nano-particles embedded in SiO1.3N1 and SiO2 dielectrics. The floating gate memory devices as a type of field effect transistor (FET) with the Au particle layer were fabricated with the thicknesses of tunneling barrier of 3 and 5 nm, control insulators of 45 nm by SiO 2 and SiO1.3N1 layers, respectively. Au thin films were deposited by using sputtering method and then, the size of Au nano-particles in the range of 1-5 nm could be controlled with nominal Au film thickness. The devices show current shift which due to programming and erasing works perform by a gate bias stress repeatedly.