Detailed Information
Cited 0 time in 
Cited 0 time in 
Cited 0 time in
Metadata Downloads
Analysis of parasitic effects in ultra wideband low noise amplifier based on em simulation
- Issue Date
- Dec-2010
- Publisher
- IEICE
- Keywords
- EM-based modeling approach; layout interconnect effect; RF CMOS Integrated circuit; UWB LNA
- Citation
- Asia-Pacific Microwave Conference Proceedings, APMC, pp.374 - 377
- Indexed
- SCOPUS
- Journal Title
- Asia-Pacific Microwave Conference Proceedings, APMC
- Start Page
- 374
- End Page
- 377
- ISSN
- 0000-0000
- Abstract
- Layout parasitic effects can significantly affect the performance of CMOS RF integrated circuits such as low noise amplifier (LNA), mixer and etc. Therefore, the analysis of parasitic effects of layout in CMOS process has become very important. In this paper, we studied a fast approach to predict the parasitic effects of an on-chip interconnect structure based on EM simulation. This approach is applied to analyze the parasitic effects in ultra wideband (UWB) LNA design. Numerical results reveal that the parasitic effects of interconnect is very critical to maintain the desired performance of a UWB LNA.
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - 서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.