PRAM and NAND flash hybrid architecture based on hot data detection
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Jung Sik | - |
dc.contributor.author | Kim, Hi-Seok | - |
dc.contributor.author | Chung, Ki Seok | - |
dc.contributor.author | Han, Tae Hee | - |
dc.date.accessioned | 2022-12-20T16:08:32Z | - |
dc.date.available | 2022-12-20T16:08:32Z | - |
dc.date.created | 2022-09-16 | - |
dc.date.issued | 2010-08 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/174318 | - |
dc.description.abstract | NAND flash memory is widely used in embedded systems, as it has various advantages, including low power consumption, a small footprint, and non-volatility. However, it has some limitations, for example, the units of its read/write operation and erase operation do not match, which lowers its performance. Furthermore, it cannot perform the in-place overwrite operation and has a limited number of erase operations. Thus, additional software techniques are required to use NAND flash memory, and numerous studies were recently conducted on hybrid architecture using NAND flash and the next-generation non-volatile memory. In this paper, it is suggested that a hot data detection layer be added to a software layer based on the NAND flash hybrid architecture with PRAM (Phase-changed RAM). The hot data detection layer is used to detect hot data and then place this data on PRAM. The simulation results showed that the read performance of the suggested method improved by 12.74%, and its write performance by 17.78% compared to existing methods. The number of erase operations was also reduced by 8.18%. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.title | PRAM and NAND flash hybrid architecture based on hot data detection | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Chung, Ki Seok | - |
dc.identifier.doi | 10.1109/ICMEE.2010.5558587 | - |
dc.identifier.scopusid | 2-s2.0-77957792027 | - |
dc.identifier.bibliographicCitation | ICMEE 2010 - 2010 2nd International Conference on Mechanical and Electronics Engineering, Proceedings, v.1, pp.V193 - V197 | - |
dc.relation.isPartOf | ICMEE 2010 - 2010 2nd International Conference on Mechanical and Electronics Engineering, Proceedings | - |
dc.citation.title | ICMEE 2010 - 2010 2nd International Conference on Mechanical and Electronics Engineering, Proceedings | - |
dc.citation.volume | 1 | - |
dc.citation.startPage | V193 | - |
dc.citation.endPage | V197 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Data detection | - |
dc.subject.keywordPlus | Hybrid architectures | - |
dc.subject.keywordPlus | NAND Flash | - |
dc.subject.keywordPlus | PRAM | - |
dc.subject.keywordPlus | SW architecture | - |
dc.subject.keywordPlus | Electronics engineering | - |
dc.subject.keywordPlus | Embedded systems | - |
dc.subject.keywordPlus | NAND circuits | - |
dc.subject.keywordPlus | Random access storage | - |
dc.subject.keywordPlus | Flash memory | - |
dc.subject.keywordAuthor | Hot data detection | - |
dc.subject.keywordAuthor | Hybrid architecture | - |
dc.subject.keywordAuthor | NAND flash | - |
dc.subject.keywordAuthor | PRAM | - |
dc.subject.keywordAuthor | SW architecture | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/5558587 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1365
COPYRIGHT © 2021 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.