Optimal Channel Ion Implantation for High Memory Margin of Capacitor-Less Memory Cell Fabricated on Fully Depleted Silicon-on-Insulator
DC Field | Value | Language |
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dc.contributor.author | Kim, Seong-Je | - |
dc.contributor.author | Oh, Jung-Mi | - |
dc.contributor.author | Shim, Tae-Hun | - |
dc.contributor.author | Park, Jea-Gun | - |
dc.date.accessioned | 2022-12-20T18:42:42Z | - |
dc.date.available | 2022-12-20T18:42:42Z | - |
dc.date.created | 2022-08-27 | - |
dc.date.issued | 2010-03 | - |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/175315 | - |
dc.description.abstract | The effect of channel doping concentration on the memory margin of capacitor-less (Cap-less) memory cells fabricated on fully depleted silicononinsulator (SOI) n-metal-oxide- semiconductor field-effect transistors (MOSFETs) was investigated. It was observed that the memory margin of Cap-less memory cells is significantly varied by the channel doping concentration, i.e., it increases with doping concentrations up to 1.4 x 10(17) cm(-3) and then decreases with higher doping concentrations. In particular, at a concentration of 1.4 x 10(17) cm(-3) it increased 1.8 times compared with that at 1.5 x 10(15) cm(-3). This gives rise to speculation that the memory margin of Cap-less memory cells fabricated on fully depleted SOI n-MOSFETs can be increased by enlarging the lateral electric field and can be decreased by reducing the current density. These results suggest that a higher memory margin in Cap-less memory cells can be obtained by optimizing channel doping concentration in fully depleted SOI n-MOSFETs. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IOP PUBLISHING LTD | - |
dc.title | Optimal Channel Ion Implantation for High Memory Margin of Capacitor-Less Memory Cell Fabricated on Fully Depleted Silicon-on-Insulator | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Park, Jea-Gun | - |
dc.identifier.doi | 10.1143/JJAP.49.036507 | - |
dc.identifier.scopusid | 2-s2.0-77953976023 | - |
dc.identifier.wosid | 000276386100064 | - |
dc.identifier.bibliographicCitation | JAPANESE JOURNAL OF APPLIED PHYSICS, v.49, no.3, pp.1 - 4 | - |
dc.relation.isPartOf | JAPANESE JOURNAL OF APPLIED PHYSICS | - |
dc.citation.title | JAPANESE JOURNAL OF APPLIED PHYSICS | - |
dc.citation.volume | 49 | - |
dc.citation.number | 3 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 4 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | SOI MOSFETS | - |
dc.subject.keywordPlus | 1T-DRAM | - |
dc.subject.keywordPlus | MOBILITY | - |
dc.identifier.url | https://iopscience.iop.org/article/10.1143/JJAP.49.036507 | - |
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