A Low Power and Area Scalable High Voltage Switch Technique for Low Operation Voltage in MLC NAND Flash Memory
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kang, Myounggon | - |
dc.contributor.author | Park, Ki-Tae | - |
dc.contributor.author | Song, Youngsun | - |
dc.contributor.author | Lew, Sungsoo | - |
dc.contributor.author | Song, Yunheub | - |
dc.contributor.author | Lim, Young-Ho | - |
dc.date.accessioned | 2022-12-20T19:09:06Z | - |
dc.date.available | 2022-12-20T19:09:06Z | - |
dc.date.created | 2022-08-27 | - |
dc.date.issued | 2010-02 | - |
dc.identifier.issn | 0916-8524 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/175493 | - |
dc.description.abstract | A new low voltage operation of high voltage switching technique, which is capable of reducing leakage current by an order of three compared to conventional circuits, has been developed for sub-1.8 V low voltage mobile NAND flash memory. In addition, by using the proposed high voltage switch, chip size scaling can be realized due to reduced a minimum required space between the N-wells of selected and unselected blocks for isolation. The proposed scheme is essential to achieve low power operation NAND Flash memory, especially for mobile electronics. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
dc.title | A Low Power and Area Scalable High Voltage Switch Technique for Low Operation Voltage in MLC NAND Flash Memory | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Song, Yunheub | - |
dc.identifier.doi | 10.1587/transele.E93.C.182 | - |
dc.identifier.scopusid | 2-s2.0-77950451602 | - |
dc.identifier.wosid | 000274537500004 | - |
dc.identifier.bibliographicCitation | IEICE TRANSACTIONS ON ELECTRONICS, v.E93C, no.2, pp.182 - 186 | - |
dc.relation.isPartOf | IEICE TRANSACTIONS ON ELECTRONICS | - |
dc.citation.title | IEICE TRANSACTIONS ON ELECTRONICS | - |
dc.citation.volume | E93C | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 182 | - |
dc.citation.endPage | 186 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | Memory architecture | - |
dc.subject.keywordPlus | NAND circuits | - |
dc.subject.keywordPlus | Area scaling | - |
dc.subject.keywordPlus | FLASH | - |
dc.subject.keywordPlus | High voltage switches | - |
dc.subject.keywordPlus | Low Power | - |
dc.subject.keywordPlus | Low voltages | - |
dc.subject.keywordPlus | NAND | - |
dc.subject.keywordPlus | Row decoder | - |
dc.subject.keywordPlus | Flash memory | - |
dc.subject.keywordAuthor | NAND | - |
dc.subject.keywordAuthor | FLASH | - |
dc.subject.keywordAuthor | row decoder | - |
dc.subject.keywordAuthor | high voltage switch | - |
dc.subject.keywordAuthor | low voltage | - |
dc.subject.keywordAuthor | area scaling | - |
dc.subject.keywordAuthor | low power | - |
dc.identifier.url | https://www.jstage.jst.go.jp/article/transele/E93.C/2/E93.C_2_182/_article | - |
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