Study of layout-effect based on S-parameter extracted by full-wave EM simulation for CMOS RFIC design
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yang, Liu | - |
dc.contributor.author | Choi, Sungju | - |
dc.contributor.author | Kim, Joonchul | - |
dc.contributor.author | Kim, Hyeong dong | - |
dc.date.accessioned | 2022-12-20T19:32:26Z | - |
dc.date.available | 2022-12-20T19:32:26Z | - |
dc.date.created | 2022-09-16 | - |
dc.date.issued | 2009-12 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/175690 | - |
dc.description.abstract | Layout parasitic components can significantly affect the performance of CMOS RF integrated circuits, and can even make a totally different representation from the circuit designed in schematic. This paper proposes a fast approach to identify the layout effect based on S-parameter of on-chip interconnect structures extracted by 3D full-wave EM simulation. In order to confirm the accuracy of modeled on-chip passive devices used in the approach, S-parameter of interconnections is firstly computed at DC and compared with schematic simulation result. CMOS RF poly-phase filter, as a design example is presented in this paper, where I/Q path mismatch effect and geometric effect are disclosed. Experimental results demonstrate that layout effect can be definitely non-negligible. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.title | Study of layout-effect based on S-parameter extracted by full-wave EM simulation for CMOS RFIC design | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Hyeong dong | - |
dc.identifier.doi | 10.1109/APMC.2009.5385243 | - |
dc.identifier.scopusid | 2-s2.0-77950661707 | - |
dc.identifier.bibliographicCitation | APMC 2009 - Asia Pacific Microwave Conference 2009, pp.2598 - 2601 | - |
dc.relation.isPartOf | APMC 2009 - Asia Pacific Microwave Conference 2009 | - |
dc.citation.title | APMC 2009 - Asia Pacific Microwave Conference 2009 | - |
dc.citation.startPage | 2598 | - |
dc.citation.endPage | 2601 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Black boxes | - |
dc.subject.keywordPlus | Full waves | - |
dc.subject.keywordPlus | On chips | - |
dc.subject.keywordPlus | Poly-phase filters | - |
dc.subject.keywordPlus | S parameters | - |
dc.subject.keywordPlus | Microwaves | - |
dc.subject.keywordPlus | Scattering parameters | - |
dc.subject.keywordPlus | CMOS integrated circuits | - |
dc.subject.keywordAuthor | Black-box | - |
dc.subject.keywordAuthor | CMOS | - |
dc.subject.keywordAuthor | Electromagnetic | - |
dc.subject.keywordAuthor | Full wave | - |
dc.subject.keywordAuthor | Interconnects | - |
dc.subject.keywordAuthor | On-chip | - |
dc.subject.keywordAuthor | Poly-phase filter | - |
dc.subject.keywordAuthor | Quadrature | - |
dc.subject.keywordAuthor | RFIC | - |
dc.subject.keywordAuthor | S-parameter | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/5385243 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1365
COPYRIGHT © 2021 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.