Large-Area Fabrication of Patterned ZnO-Nanowire Arrays Using Light Stamping Lithography
- Authors
- Hwang, Jae K.; Cho, Sangho; Seo, Eun K.; Myoung, Jae M.; Sung, Myung M.
- Issue Date
- Dec-2009
- Publisher
- AMER CHEMICAL SOC
- Keywords
- light stamping lithography; ZnO nanowire; patterning; self-assembly; field-effect transistor
- Citation
- ACS APPLIED MATERIALS & INTERFACES, v.1, no.12, pp.2843 - 2847
- Indexed
- SCIE
SCOPUS
- Journal Title
- ACS APPLIED MATERIALS & INTERFACES
- Volume
- 1
- Number
- 12
- Start Page
- 2843
- End Page
- 2847
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/175790
- DOI
- 10.1021/am900580v
- ISSN
- 1944-8244
- Abstract
- We demonstrate selective adsorption and alignment of ZnO nanowires on patterned poly(dimethylsiloxane) (PDMS) thin layers with (aminopropyl)siloxane self-assembled monolayers (SAMs). Light stamping lithography (LSL) was used to prepare patterned PDMS thin layers as neutral passivation regions on Si substrates. (3-Aminopropyl)triethoxysilane-based SAMs were selectively formed only on regions exposing the silanol groups of the Si substrates. The patterned positively charged amino groups define and direct the selective adsorption of ZnO nanowires with negative surface charges in the protic solvent. This procedure can be adopted in automated printing machines that generate patterned ZnO-nanowire arrays on large-area substrates. To demonstrate its usefulness, the LSL method was applied to prepare ZnO-nanowire transistor arrays on 4-in, Si wafers.
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