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Electrical behavior of ultra-thin body silicon-on-insulator n-MOSFETS at a high operating temperature

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dc.contributor.authorKim, Seong-Je-
dc.contributor.authorShim, Tae-Hun-
dc.contributor.authorPark, Jea-Gun-
dc.date.accessioned2022-12-20T21:25:48Z-
dc.date.available2022-12-20T21:25:48Z-
dc.date.created2022-08-26-
dc.date.issued2009-08-
dc.identifier.issn1229-9162-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/176408-
dc.description.abstractRecessed ultra-thin body (UTB) silicon-on-insulator (SOI) n-meta-oxide-semiconductor field-effect transistors (MOSFETs) with a top silicon thickness of less than 10 nm were successfully fabricated. We investigated the dependence of their electrical characteristics, such as subthreshold conduction and effective mobility, on the operating temperature the different channel thicknesses of less than 10 nm. In the case of a 4.5-nm-channel UTB SOI n-MOSFET, it was observed that as the temperature rises, the subthreshold conduction characteristic became sensitive to temperature, while the leakage current was insensitive to temperature. In addition, the effective mobility of a 4.5-nm-thick UTB SOI n-MOSFET decreased because the carrier transport was suppressed by scatterings both from surface and interface roughness scatterings. In particular, we confirmed that mobility differences at the effective fields of 0.1 and 0.3 MV/cm decrease with a rise in temperature resulting from the mobility being dominated by phonon scattering rather than scatterings from surface roughness.-
dc.language영어-
dc.language.isoen-
dc.publisherKOREAN ASSOC CRYSTAL GROWTH, INC-
dc.titleElectrical behavior of ultra-thin body silicon-on-insulator n-MOSFETS at a high operating temperature-
dc.typeArticle-
dc.contributor.affiliatedAuthorPark, Jea-Gun-
dc.identifier.doi10.36410/jcpr.2009.10.4.507-
dc.identifier.scopusid2-s2.0-70350161805-
dc.identifier.wosid000270197300019-
dc.identifier.bibliographicCitationJOURNAL OF CERAMIC PROCESSING RESEARCH, v.10, no.4, pp.507 - 511-
dc.relation.isPartOfJOURNAL OF CERAMIC PROCESSING RESEARCH-
dc.citation.titleJOURNAL OF CERAMIC PROCESSING RESEARCH-
dc.citation.volume10-
dc.citation.number4-
dc.citation.startPage507-
dc.citation.endPage511-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.identifier.kciidART001468703-
dc.description.journalClass1-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.description.journalRegisteredClasskci-
dc.relation.journalResearchAreaMaterials Science-
dc.relation.journalWebOfScienceCategoryMaterials Science, Ceramics-
dc.subject.keywordPlusTHRESHOLD VOLTAGE-
dc.subject.keywordPlusSOI MOSFET-
dc.subject.keywordPlusMOBILITY-
dc.subject.keywordPlusIMPACT-
dc.subject.keywordAuthorRecess channel-
dc.subject.keywordAuthorHeating-
dc.subject.keywordAuthorNano-SOI-
dc.subject.keywordAuthorThermal conductivity-
dc.identifier.urlhttps://www.kci.go.kr/kciportal/landing/article.kci?arti_id=ART001468703-
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