Optimisation of RunBefore decoder and first one detector for MPEG-4 AVC/ H.264 CAVLC decoding

Abstract

In this paper, we propose a novel RunBefore decoder and a new FOD (first one detector) for MPEG-4 AVC/H.264 CAVLC decoding. By reusing common blocks aggressively, the proposed FOD has smaller area and less power consumption. Also, a new RunBefore decoder which decodes two values in one clock has been designed to improve the decoding performance. The proposed CAVLC decoder has been designed in Verilog HDL and synthesised by Synopsys' design compiler using MagnaChip 0.18m CMOS cell library. Performance evaluation results show that our design has on average 48% faster than conventional designs.