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Characteristics of the ZnO thin film transistor by atomic layer deposition at various temperatures

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dc.contributor.authorKwon, Semyung-
dc.contributor.authorBang, Seokhwan-
dc.contributor.authorLee, Seungjun-
dc.contributor.authorJeon, Sunyeol-
dc.contributor.authorJeong, Wooho-
dc.contributor.authorKim, Hyungchul-
dc.contributor.authorGong, Su Cheol-
dc.contributor.authorChang, Ho Jung-
dc.contributor.authorPark, Hyung-Ho-
dc.contributor.authorJeon, Hyeongtag-
dc.date.accessioned2022-12-20T23:01:33Z-
dc.date.available2022-12-20T23:01:33Z-
dc.date.issued2009-03-
dc.identifier.issn0268-1242-
dc.identifier.issn1361-6641-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/177142-
dc.description.abstractZnO thin films were deposited by atomic layer deposition (ALD) at various temperatures and the resulting electrical and chemical properties were examined. The fraction of O-H bonds in ZnO films decreased from 0.39 to 0.24 with increasing processing temperatures. The O/Zn ratio decreased from 0.90 at 70 degrees C to 0.78 at 130 degrees C. The carrier concentration and resistivity changed sharply with decreasing temperature. The ZnO thin film transistors (TFTs) were fabricated at processing temperatures of 70 to 130 degrees C and the electrical properties of the TFT were as follows: the field-effect mobility ranged from 8.82 x 10(-3) to 6.11 x 10(-3) cm(2) V-1 s(-1), the on/off current ratio ranged from 1.28 x 10(6) to 2.43 x 10(6), the threshold voltage ranged from -12.5 to 14.7 V and the subthreshold swing ranged from 1.21 to 24.1 V/decade. The electrical characteristics of the ZnO TFT were enhanced as the processing temperature decreased.-
dc.format.extent6-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Physics Publishing-
dc.titleCharacteristics of the ZnO thin film transistor by atomic layer deposition at various temperatures-
dc.typeArticle-
dc.publisher.location영국-
dc.identifier.doi10.1088/0268-1242/24/3/035015-
dc.identifier.wosid000263676900016-
dc.identifier.bibliographicCitationSemiconductor Science and Technology, v.24, no.3, pp 1 - 6-
dc.citation.titleSemiconductor Science and Technology-
dc.citation.volume24-
dc.citation.number3-
dc.citation.startPage1-
dc.citation.endPage6-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaMaterials Science-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryMaterials Science, Multidisciplinary-
dc.relation.journalWebOfScienceCategoryPhysics, Condensed Matter-
dc.subject.keywordPlusROOM-TEMPERATURE-
dc.subject.keywordPlusCHANNEL LAYER-
dc.subject.keywordPlusOXIDE-
dc.subject.keywordPlusTHICKNESS-
dc.subject.keywordPlusGROWTH-
dc.identifier.urlhttps://iopscience.iop.org/article/10.1088/0268-1242/24/3/035015-
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