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Analysis of temperature-dependent barrier heights in erbium-silicided Schottky diodes

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dc.contributor.authorJun, Myungsim-
dc.contributor.authorJang, Moongyu-
dc.contributor.authorKim, Yarkeon-
dc.contributor.authorChoi, Cheljong-
dc.contributor.authorKim, Taeyoub-
dc.contributor.authorOh, Soonyoung-
dc.contributor.authorLee, Seongjae-
dc.date.accessioned2022-12-21T04:49:53Z-
dc.date.available2022-12-21T04:49:53Z-
dc.date.issued2008-01-
dc.identifier.issn1071-1023-
dc.identifier.issn2166-2746-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/179085-
dc.description.abstractWe manufactured erbium-silicided Schottky diodes on n-type and p-type silicon substrates to determine the Schottky barrier heights for electrons and holes, respectively. The effective barrier heights were extracted from the current-voltage-temperature characteristics of the Schottky diodes in reverse-bias condition. The barrier heights were obtained as a function of temperature, decreasing with the decrease of temperature. Low effective barrier heights at low temperature may be due to the trap-assisted current at the erbium silicide/silicon Schottky junction. The temperature-independent barrier heights for electrons and holes were evaluated to be 0.39 and 0.69 eV, respectively, at high temperature by fitting the effective barrier heights as a function of temperature. In this case, the carrier conduction mechanism can be explained by the pure thermionic emission model.-
dc.format.extent4-
dc.language영어-
dc.language.isoENG-
dc.publisherAmerican Institute of Physics-
dc.titleAnalysis of temperature-dependent barrier heights in erbium-silicided Schottky diodes-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1116/1.2825172-
dc.identifier.scopusid2-s2.0-38849135668-
dc.identifier.wosid000253399000032-
dc.identifier.bibliographicCitationJournal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, v.26, no.1, pp 137 - 140-
dc.citation.titleJournal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures-
dc.citation.volume26-
dc.citation.number1-
dc.citation.startPage137-
dc.citation.endPage140-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusSILICON INTERFACES-
dc.subject.keywordPlusINHOMOGENEITIES-
dc.subject.keywordPlusMECHANISMS-
dc.subject.keywordPlusTRANSPORT-
dc.subject.keywordPlusCONTACTS-
dc.subject.keywordPlusJUNCTION-
dc.identifier.urlhttps://avs.scitation.org/doi/full/10.1116/1.2825172-
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