LIRS-WSR: Integration of LIRS and Writes Sequence Reordering for flash memory
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jung, Hoyoung | - |
dc.contributor.author | Yoon, Kyunghoon | - |
dc.contributor.author | Shim, Hyoki | - |
dc.contributor.author | Park, Sungmin | - |
dc.contributor.author | Kang, Sooyong | - |
dc.contributor.author | Cha, Jae Hyuk | - |
dc.date.accessioned | 2022-12-21T06:54:38Z | - |
dc.date.available | 2022-12-21T06:54:38Z | - |
dc.date.created | 2022-09-16 | - |
dc.date.issued | 2007-08 | - |
dc.identifier.issn | 0302-9743 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/179745 | - |
dc.description.abstract | Most of the mobile devices are equipped with NAND flash memories even if it has characteristics of not-in-place update and asymmetric I/O latencies among read, write, and erase operations: a write/erase operation is much slower than a read operation in a flash memory. For the overall performance of a flash memory system, the buffer replacement policy should consider the above severely asymmetric I/O latencies. Existing buffer replacement algorithms such as LRU, LIRS, and ARC cannot deal with the above problems. This paper proposes an add-on buffer replacement policy that enhances LIRS by reordering writes of not-cold dirty pages from the buffer cache to flash storage. The enhances LIRS-WSR algorithm focuses on reducing the number of write/erase operations as well as preventing serious degradation of buffer hit ratio. The trace-driven simulation results show that, among the existing buffer replacement algorithms including LRU, CF-LRU, ARC, and LIRS, our LIRSWSR is best in almost cases for flash storage systems. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | Springer Verlag | - |
dc.title | LIRS-WSR: Integration of LIRS and Writes Sequence Reordering for flash memory | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Cha, Jae Hyuk | - |
dc.identifier.doi | 10.1007/978-3-540-74472-6_18 | - |
dc.identifier.scopusid | 2-s2.0-38049060375 | - |
dc.identifier.bibliographicCitation | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), v.4705 LNCS, no.PART 1, pp.224 - 237 | - |
dc.relation.isPartOf | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | - |
dc.citation.title | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | - |
dc.citation.volume | 4705 LNCS | - |
dc.citation.number | PART 1 | - |
dc.citation.startPage | 224 | - |
dc.citation.endPage | 237 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Algorithms | - |
dc.subject.keywordPlus | Embedded systems | - |
dc.subject.keywordPlus | Input output programs | - |
dc.subject.keywordPlus | Mobile devices | - |
dc.subject.keywordPlus | NAND circuits | - |
dc.subject.keywordPlus | Buffer replacement algorithm | - |
dc.subject.keywordPlus | Writes Sequence Reordering | - |
dc.subject.keywordPlus | Flash memory | - |
dc.subject.keywordAuthor | Buffer replacement algorithm | - |
dc.subject.keywordAuthor | Embedded system | - |
dc.subject.keywordAuthor | Flash memory | - |
dc.subject.keywordAuthor | Storage system | - |
dc.identifier.url | https://link.springer.com/chapter/10.1007/978-3-540-74472-6_18 | - |
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